Oscar Software Framework Manual Simulation on Host Platform
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In order to allow the developer to test and debug his application code on the host instead of directly moving to the target platform, the host implementation needs to simulate certain aspects of the target hardware. One approach to this problem would be the real-time simulation of all hardware-related events and their effects down to the microsecond. Unfortunately, the implementation of such a sophisticated simulation framework requires too much effort to be feasible in our limited time frame. For this reason, a simpler solution being tailored to the requirements of most computer vision applications was chosen.
Time is split into discrete time steps. Every time step usually represents a calculation cycle of the application, which is very similar to a clock cycle in a digital circuit. First, the inputs are read, then a calculation is performed and finally the outputs are written. This is illustrated in the figure 'Simulation Cycle'. It is not mandatory for the application to read the inputs or write outputs every time step. On the other hand inputs can also be polled and outputs written more than once in the same cycle. Together with the fact that the application itself controls the advancing of the time step over the sim module, this provides a lot of flexibility.
There exist special modules which associate time steps with input and output values. The reader modules parse a file with a set of inputs on a timeline or generate the file name of a file-based I/O, e.g. an image, from specified rules. The writer modules on the other hand write out the current value of the outputs each time step.