verilog-components
Here are 27 public repositories matching this topic...
A collection of digital circuits using Verilog.
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Aug 13, 2021 - Verilog
A Verilog HDL code
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Dec 26, 2022 - Verilog
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May 29, 2021 - HTML
Basics of Verilog implementation
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Aug 4, 2022 - SystemVerilog
digital systems
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Aug 26, 2021 - Verilog
second project - Digital System
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Sep 7, 2021 - Verilog
University of Marmara, CSE3015 2018 Fall Project
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May 14, 2019 - Java
High speed C/C++ based behavioural Verilog memory model
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Jan 14, 2024 - C
Some of the projects I developed during my studies at University of Thessaly, Electrical & Computer Engineering Dpt.
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Aug 6, 2020 - C
سورس کد پروژه های درس طراحی سیستم های دیجیتال برنامه پذیر دانشگاه تبریز مقطع کارشناسی رشته مهندسی کامپیوتر
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Jan 9, 2024 - Verilog
A coocbook of HDL (primarily Verilog) modules
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Apr 24, 2017 - Verilog
Practices related to the fundamental level of the programming language Verilog.
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Jan 16, 2023 - Verilog
Provide / define the INPUT_CLK_HZ parameter and the BHG_FP_clk_divider.v will generate a clock at the specified CLK_OUT_HZ parameter using fractional floating point division.
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Aug 11, 2022 - Verilog
A simple 8 bit UART implementation in Verilog, with tests and timing diagrams
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May 28, 2023 - Verilog
Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface
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Nov 21, 2017 - Verilog
A wishbone controlled FM transmitter hack
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Jan 16, 2024 - Verilog
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