Python package to transfer data in a fast, reliable, and packetized form

Uart terminal for Flipper Zero

usbasp improved firmware

Basic UART TX/RX module for FPGA

C++ Interface for the Bosch-Sensortec's BNO055 compatible with Espressif's ESP32 SoC running esp-idf.

A simple 8 bit UART implementation in Verilog, with tests and timing diagrams

A heavy modification of the original c_uart_interface_example, works on ARM Cortex-M4 STM32F4 (as an offboard processor)

Examples of applications based on RIOT-OS

An Object Pascal UART Terminal for USBasp UART firmwares.

sc16is750/752 driver for esp-idf

USSD sender/decoder with AT Commands - PySerial - python environment

VHDL codes for UART Interface; hardware communication protocol. contains Receiver & Transmitter units & RAM memory.

The is for beginners/intermediates who seek core understanding of microcontroller principles: such as interfacing a single low-end CMOS 8051 micro-chip with some peripherals: where all working together as a system.

A library that turns microcontroller's UART peripheral to a simple, multi-master bus system. The project also features an RPC library for a microcontroller, device auto-discovery, code upload, gateway between the bus and PC, java code to manage microcontroller's RPC on a higher level of abstraction.

The goal of this project is design a system capable of measuring resistance, inductance (and ESR), and capacitance

Altera wrappers for C applications using Altera's 16550 UART Core through Avalon Bus on Cyclone V.

Complete ASIC Design of UART Interface with Baud Rate Selection :- RTL to GDS2

SMS sender with AT Commands - PySerial - python environment

implementing a protected communication platform between 2 FPGA's. Data is entered through a keyboard-FPGA interface then the data is encrypted using AES encryption and sent to the second FPGA where the decryption occurs if the decryption key is given and the data is displayed using an FPGA-LCD interface using VHDL scripts

IoT Healthcare App