rv32e

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Here are 4 public repositories matching this topic...

darklife / darkriscv

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opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

cpu fpga core processor riscv rtl verilog risc-v rv32i softcore processor-design rv32e

Updated Apr 18, 2024
Verilog

syntacore / scr1

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SCR1 is a high-quality open-source RISC-V MCU core in Verilog

core riscv rtl ip verilog risc-v rv32i rv32e rv32imc rv32emc

Updated May 6, 2024
SystemVerilog

jgobi / fewcore

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FEWcore é um core RISC-V que segue as especificações RV32E com algumas leves modificações. Este projeto é o trabalho prático da disciplina Organizações de Computadores 2 no semestre 2018/2 da UFMG.

cpu riscv verilog risc-v ufmg rv32e

Updated Dec 15, 2018
Verilog

avx / riscv_memops

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risc-v optimized memset, memcpy, memmove implementations

riscv risc-v memset rv32e memcpy rv64gc memmove

Updated Jan 17, 2023
Assembly

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rv32e

Here are 4 public repositories matching this topic...

darklife / darkriscv

syntacore / scr1

jgobi / fewcore

avx / riscv_memops

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