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72 public repositories
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fibonacci number calculator written in Verilog-HDL
Updated
Feb 23, 2017
Verilog
Vue 2.0 admin management system template based on iView 个人修改版
Updated
Mar 1, 2018
JavaScript
A repo for CS 3339 students learning verilog
Updated
Mar 2, 2018
Verilog
Assignments pertaining to Course CO200 - Computer Organization and Architecture
Updated
Oct 24, 2018
Verilog
Updated
Jun 27, 2019
Verilog
A MIPS softcore processor to average images together and output to VGA on a Nexys 4 DDR FPGA.
Lab exercises of the course F342 Computer Architecture
Updated
Nov 10, 2019
Verilog
Verilog codes developed as a part of COA lab course
Updated
Feb 1, 2020
Verilog
Updated
Jul 17, 2020
Verilog
Hardware implementation, using a Digilent Basys-3 FPGA board, of the computer described in J. Clark Scott's book "But How Do It Know?".
Updated
Aug 3, 2020
Verilog
setup script for iverilog+gtkwave by inno setup
Updated
Aug 14, 2020
Inno Setup
🔮 A 16-bit MIPS Processor Implementation in Verilog HDL
Updated
Aug 30, 2020
Verilog
a project to check the FOSS synthesizers against vendors EDA tools
Updated
Sep 26, 2020
Makefile
This is a bitty CPU core of risc-v architecture, which is currently under development.
Updated
Oct 23, 2020
Verilog
Tutorial series on verilog with code examples. Contains basic verilog code implementations and concepts.
Updated
Nov 25, 2020
Verilog
Embedded Systems Lab Work
Updated
Dec 18, 2020
Verilog
This repo consists of the iverilog implementation of a Parallel Prefix adder - 8bit (I/P - O/P). This was done as a part of a project Under UE19CS206 - Digital Design and Computer Organization Laboratory Course at PES University.
Updated
Jan 6, 2021
Verilog
Synthesizable real number library in SystemVerilog, supporting both fixed- and floating-point formats
Updated
Jan 13, 2021
SystemVerilog
Multi-port BRAM IP for ASIC and FPGA
Updated
Apr 21, 2021
SystemVerilog
Computer Architecture -VLSI -Verilog Codes-Xilinx-Irsim
Updated
May 8, 2021
Verilog
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