Noise Correction Algorithm for sCMOS cameras

The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout design is done using Cadence Virtuoso’s ADE, & the Static Noise Margin is obtained through Matlab scripts.

Home Brew 8 Bit CPU Hardware Implementation including a Verilog simulation, an assembler, a "C" Compiler and this repo also contains my research and learning. See also the Hackaday.IO project. https://hackaday.io/project/166922-spam-1-8-bit-cpu

axiom micro mainboard containing the cmos sensor, headers for plugin modules and more

Building a computer from scratch using 74xx logic chips

A browser-based SPICE circuit simulator

This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.

This project was performed on the completion of our B. Tech 4th Semester Summer Training cum Academic Internship Programme on "RISC-V based 32-bit Digital Processor Design using SPICE" under E&ICT Academy IIT Guwahati and Assam Science & Technology University, Guwahati under TEQIP III in association with VLSI Expert

All the projects and assignments done as part of VLSI course.

Code to use the C++ API for Thorlabs CMOS USB cameras in Matlab.

Simple, self-contained, clean code, well-documented, hobbyist 64-bit operating system for Intel and AMD processors. It's written in Assembly (Intel syntax) and C (GNU99 Standard) in which I strive for adding comments to the source code so it could be used as a reference for future OS developers

This is a Mini Project assigned in the subject CMOS Analog and VLSI design at IITB.

A retro-style digital clock based on 74xx discrete logic chips

Converting Boolean expressions to CMOS Circuits

This project shows how to design a clock bootstrapped circuit to improve the nonlinearity of the switch used in Track & Hold circuit. A comparison is done between several topologies, showing the ENOB, SNR, & SFDR achieved in each case.

FuzzyMSFLA-Algorithm (Fuzzy adaptive optimisation method)

A utility to read, write CMOS and RTC data. Standard library not required.

A clock divider module that uses 4040 chip. It divides by 2; 4; 8; 16; 32; 64; 128; 226; 512; 1024; 2048; 4096.

Logic IC Testing Device Using Arduino

Optimisation procedure written in tcl for (Area, Delay, Power) with the usage of Dual-Vth CMOS technology within Synopsys DC and PT