Dadda multiplier(8*8, 16*16, 32*32) in Verilog HDL.

simple verilog digital circuits sampels (halfAdder, fullAdder, ALSU , ...)

These are VHDL codes for a signed 4bit multiplier using 4bit adders. Base on Baugh-Wooley Method.

Digital Logic Design using pen and paper to design with Analog discovery 2, and using Verilog for synthesizing. these are some of my junior year labs for Digital Electronics

LTSpice simulation software is used to study the behavior of a Memristor. Different logic gates like NOR, NAND and XOR were modelled and simulated followed by the simulation of a memristor based full-adder.

This is a VHDL code for 4bit multiplier using 4bit full adder circuit structurally modelled.

A project that simulate the circuits FullAdder and FullSubtractor

one cycle unsigned multiplier, don't cares of resources fpga or asic structures

Digital Design using Verilog

4 bit ALU in verilog

This project was performed on the completion of our B. Tech 4th Semester Summer Training cum Academic Internship Programme on "RISC-V based 32-bit Digital Processor Design using SPICE" under E&ICT Academy IIT Guwahati and Assam Science & Technology University, Guwahati under TEQIP III in association with VLSI Expert

4-bit Serial Adder/Subtractor with Parallel Load

Learned as a part of CS210 course

A collection of Verilog code examples, perfect for beginners or anyone looking to learn Verilog. These examples are based on my homework assignments from my university and include comments and explanations to help you understand the code better. Check out the link below for more information about Verilog!! 👇

Simulation of full adder circuit to add two byte-sized integers in Python 3.

➕➖ Arithmetic operations in most machines are performed in the ALU whereby logic gates and flipflops are combined so that they can subtract, multiply, and divide binary numbers. This circuit only implements the addition part and subtraction on four bit digits

Some logic circuits for studies and reviews

➕➕ Arithmetic operations in most machines are performed in the ALU whereby logic gates and flipflops are combined so that they can subtract, multiply, and divide binary numbers. This circuit only implements the addition part, on four bit digits