Over-engineered SDR development board
-
Updated
May 28, 2024 - VHDL
Over-engineered SDR development board
The code allows anyone with the Artix A7 FPGA Board to Blink the On-Board LED for any predefined Frequency.
Alchitry Au FPGA Board Example Project
A Vitis & Vivado project (for the Basys3 board (Atrix-7 FPGA)) that reads integers input on the switches sequentially, adds them up and displays them on the 7 segment diaplay. Demonstrates Microblaze, AXI and AXI streams.
A Vitis & Vivado project (for the Basys3 board (Atrix-7 FPGA)) that generates primes and sums them up over an AXI memory interface.
An Artix 7 based dual channel oscilloscope.
A collection of code from CDA 4240C: Design of Digital System and Lab
Implementation of a MIPS processor on a Xilinx Artix-7 FPGA.
南理工数字系统综合实验实验代码/实验报告
Created project using a PCIe root-complex and endpoint on a Xilinx Artix-7.
Add a description, image, and links to the artix-7 topic page so that developers can more easily learn about it.
To associate your repository with the artix-7 topic, visit your repo's landing page and select "manage topics."