notes about many, many topics ...

AI-driven identification of biomarkers from hemodialysis data.

QM is a containerized environment for running Functional Safety qm (Quality Management) software

A mixed-criticality platform built around Cheshire, with a number of safety/security and predictability features. Ready-to-use FPGA flow on multiple boards is available.

Mirror repository for open-source OPC-UA Toolkit designed with security and embedded devices in mind. Main repository is on gitlab:

Software Quality Management Tool

A space computing platform built around Cheshire, with a configurable number of safety, security, reliability and predictability features with a ready-to-use FPGA flow on multiple boards.

ELISA Aerospace Working Group

OmniSafe is an infrastructural framework for accelerating SafeRL research.

🚧 🚔 ⚠ Toolbox to compute Criticality Measures for Automated Vehicles

NeurIPS 2023: Safety-Gymnasium: A Unified Safe Reinforcement Learning Benchmark

Fast and flexible data logging/tracing toolkit for software testing and debugging. Minimally intrusive C/C++ code instrumentation, host-based decoding application, demo code included.

Matlab implementation of the paper "Predictive Safety Filter using System Level Synthesis"

List of resources about programming practices for writing safety-critical software.

🚗 A repository for documenting and exploring the world of autonomous driving safety, featuring a curated collection of research papers, reports, and resource.

Helpful software library for quickly & easily adding support for fixed-size (bounded) queues to your Arduino project.

Bourne shell, template engine, scripting language reliable, scalable projects. Based a ISO standard proven effective for large, mission-critical projects, SparForte is designed for fast development while, at the same time, providing easier designing, maintenance and bug removal. About 130.000 lines of code.

Replacements to standard numeric types which throw exceptions on errors

The PML analyzer is an open source API providing a simple DSL to build a description of the architecture of your chip based on the PHYLOG Modelling Language (PML).

Constant-complexity deterministic memory allocator (heap) for hard real-time high-integrity embedded systems. There is very little activity because the project is finished and does not require further changes.