Risc-V 32i processor written in the Verilog HDL
-
Updated
Nov 27, 2022 - Verilog
Risc-V 32i processor written in the Verilog HDL
RV32I core using TL-Verilog.This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve Hoover
Add a description, image, and links to the riscv32i topic page so that developers can more easily learn about it.
To associate your repository with the riscv32i topic, visit your repo's landing page and select "manage topics."