Dionysios Diamantopoulos Web Edition
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Updated
Aug 3, 2021 - JavaScript
Dionysios Diamantopoulos Web Edition
This directory contains the source code for implementing Random Linear Network Coding (RLNC) into Multi-Processor System-on-Chips (MPSoC). By exploiting data vectorization, we obtained latency and throughputs gains during the matrix multiplication operations.
Fork from PYNQ branch with fixes and modifications for Digilent Genesys Zu.
The Fifth Driver is a project for the Adaptative Computing Developer Contest for Xilinx. We pretend to demonstrate that the Xilinx Ultrascale+ MPSoC architecture is suitable for developing machine learning applications applied to Autonomous Driving.
Zynq MP SoC in a Zynq XCZ7010 development board
i2c-xiic driver with added support for master_xfer_atomic()
integration of ROS robotics framework with a simulation model of multiprocessor system on chip (MPSOC)
Final projects of Intelligent Mobile Robotics gradutate course -- 2018 2nd semester
Sources and data of the SystemC simulation used in our journal article for MDPI Applied Sciences Special Issue "New Trends in Real-Time Embedded Systems"
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