Cache-Based Side-Channel Attacks in FPGA SoCs
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Updated
Mar 5, 2023 - Tcl
Cache-Based Side-Channel Attacks in FPGA SoCs
Task Scheduling on Heterogeneous system
The main VAMOS repository
Optimization of K-means algorithm targetting a CPU-(2x)GPU-FPGA system with OpenMP, OpenCL and CUDA.
Heterogeneous Multi-agent Version of Highway-env
Multi-computer symlinks for *NIX "dot" configuration files
Codes for estimates of intensity functions parameters of multivariate counting processes and density estimation for latent variable.
High-level heterogeneous adaptive embedded system designer and simulator
⛔ DEPRECATED ⛔ HERO toolchain with support for RISC-V offloading over OpenMP Accelerator Execution Model
Code for paper "Joint Architecture Design and Workload Partitioning for DNN Inference on Industrial IoT Clusters"
Optimization of the SLAMBench workload targetting a CPU-GPU-FPGA system (using OpenCL). Mainly focused in Altera FPGA devices.
Heterogeneous Programming Library. Facilitates the use of accelerators on top of OpenCL
Scalable Cluster Administration Bash framework
Heterogeneous Workflow executor service
Adaptive Informative Sampling with Environment Partitioning for Heterogeneous Multi-Robot Systems (IROS 2020)
⛔ DEPRECATED ⛔ HERO Software Development Kit
STOMP: Scheduling Techniques Optimization in heterogeneous Multi-Processors
Concurrent CPU-GPU Programming using Task Models
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