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porject from designing with VHDL course. Includes, FSM (finite state machine), next state logic,seven-segment-display-decode, full adder, flip flops, D_flip-flops, ripple carry adder, full adder, half adder, delay propagation

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Battleship.zip

Battleship.zip

 
 

D_Flip_Flop.zip

D_Flip_Flop.zip

 
 

Delay_Propogation.zip

Delay_Propogation.zip

 
 

FSM.zip

FSM.zip

 
 

Fulladder.zip

Fulladder.zip

 
 

NSL.zip

NSL.zip

 
 

RCA.zip

RCA.zip

 
 

SSDD.zip

SSDD.zip

 
 

counter.zip

counter.zip

 
 

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porject from designing with VHDL course. Includes, FSM (finite state machine), next state logic,seven-segment-display-decode, full adder, flip flops, D_flip-flops, ripple carry adder, full adder, half adder, delay propagation

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fsm delay vhdl finite-state-machine battleship fulladder battleship-game seven-segments-display flip-flop flip-flops ripple-carry-adder adder-subtractor next-state-logic delay-propogation
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