arch-arm: Implement FEAT_MPAM in CPU #1082
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This is for fast retrieval of the highest implemented exception level Change-Id: Id631c2b999d46a8b79570e4043ae04bc2b2e7531 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Richard Cooper <richard.cooper@arm.com>
This patch is adding FEAT_MPAM register definition/decoding. Co-authored-by: Hristo Belchev <hristo.belchev@arm.com> Co-authored-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Change-Id: I70483fcc758419365f4b3762479684c6c52f4d62 Signed-off-by: Adrián Herrera <adrian.herrera@arm.com> Reviewed-by: Richard Cooper <richard.cooper@arm.com>
With this patch we are adding the specific logic required to tag memory requests from the PE with MPAM data. This is happening within the MMU before a translation is completed Change-Id: Ifecb285244dd469a639150d69a7e884fe3c441be Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Richard Cooper <richard.cooper@arm.com>
andysan
approved these changes
May 13, 2024
ivanaamit
approved these changes
May 13, 2024
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This PR implements FEAT_MPAM on the CPU side. We define a MPAM system registers and a mechanism
for tagging memory requests with the MPAM information bundle as specified in existing documentation 1.
What this PR is not covering is the MPAM implementation in a MSC (Memory System Component).
Which means at the moment it's only possible to have static partitioning schemes (via the PartitioningPolicies
already part of gem5) and there is currently no way to dynamically program partitions at runtime.