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43 Open 183 Closed
43 Open 183 Closed
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Issues list

Build ROCm disk image
#1119 opened May 9, 2024 by ivanaamit v24.0
@Harshil2107
global instruction counter
#1087 opened Apr 30, 2024 by studyztp
1
Indirect Memory Prefetcher only performs a single indirect prefetch even if the prefetch distance is bigger than 1 bug
#1050 opened Apr 21, 2024 by sapphi-red
1
2
cpu-o3: executing MFENCE in two parallel SMT threads causes hang bug
#1049 opened Apr 20, 2024 by nmosier
1
3
arch-riscv: vector tail/mask policy dependencies arch-riscv The RISC-V ISA
#997 opened Apr 5, 2024 by saul44203 v24.0
2
c.jr/c.jalr semantic wrong bug
#981 opened Apr 1, 2024 by Ye-Jinhong
4
Docker Image for Ubuntu 20.04 in the gem5 documentation is an incorrect version. bug needs details Needs more information to reproduce or more details
#960 opened Mar 24, 2024 by Shreesh-Kulkarni
2
AVX KVM Xsave issue bug
#958 opened Mar 23, 2024 by abmerop
@abmerop
3
arch-x86,O3,KVM switching to full simulation bug bug
#910 opened Mar 4, 2024 by Foxy-Boxes
4
Test support for Ubuntu 24.04 tests gem5's Testing Infrastructure util-docker Docker util files. That found in "utils/docker"
#909 opened Mar 4, 2024 by ivanaamit v24.0
1
@BobbyRBruce
3
arch-x86: bug in movss instruction arch-x86 The X86 ISA bug
#893 opened Feb 26, 2024 by Nils-TUD
1
5
arch-riscv: remove branching from vset{i}vl{i} instruction and allow registers vl and vtype to be renamed arch-riscv The RISC-V ISA
#885 opened Feb 21, 2024 by saul44203
6
CLFLUSH causes TLB assertion error bug
#862 opened Feb 9, 2024 by hnpl
2
RVV instruction vmem faults caused by incorrect vl bug
#860 opened Feb 9, 2024 by AppDoraemon
1
The checkpoint feature may not have successfully saved and restored some data. bug
#802 opened Jan 24, 2024 by despotx
4
Q: highly likely incorrect aarch64 ldaxrh instruction disassembly arch-arm The ARM ISA bug
#788 opened Jan 19, 2024 by alsam
2
KVM not supported in GitHub Action Runner testing infrastructure. This should be fixed. cpu-kvm gem5's KVM CPU enhancement github gem5 files necessary for GitHub integration. Found in ".github" tests gem5's Testing Infrastructure
#787 opened Jan 19, 2024 by BobbyRBruce
Prefetcher coverage, accuracy calculation and throttling mechanism that requires correct pfUseful metric is incorrect for classic cache bug
#785 opened Jan 18, 2024 by AbhishekUoR
3
Model RVV permutation instructions more granularly
#776 opened Jan 16, 2024 by camel-cdr
Support non-block prefetch inst in Ruby mem-ruby Ruby caches, structures, and protocols
#768 opened Jan 12, 2024 by seanzw
Queued prefetcher only looks into Data TLB (DTB), which makes it inefficient with I-side prefetchers bug
#766 opened Jan 12, 2024 by giactra
Sv39 and Sv48 in gem5 arch-riscv The RISC-V ISA bug
#753 opened Jan 9, 2024 by hnpl
1
Modify gem5 to pass an object upon an exit event instead of a string enhancement python gem5's Python SimObject wrapping and infrastructure stdlib The gem5 standard library. Code typically found under "src/pythongem5"
#751 opened Jan 9, 2024 by BobbyRBruce v24.0
1
@BobbyRBruce
1
Add automatic regression test to check for performance degradations enhancement tests gem5's Testing Infrastructure
#702 opened Dec 20, 2023 by BobbyRBruce
1
the stat.txt generated by gem5 does not include statistics for vector memory access operations such as ‘VectorUnitStrideLoad’? bug
#700 opened Dec 20, 2023 by icuuuuuuer
7
ProTip! Updated in the last three days: updated:>2024-05-06.