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configs,cpu: Enable the config run in multi-ISA gem5 #1068

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@rogerchang23424 rogerchang23424 commented Apr 24, 2024

In the PR, replace the CPU objects with ISA specified. Like O3CPU ->
X86O3CPU, TimingSimpleCPU -> RiscvTimingSimpleCPU.

Change-Id: I255a2d49b672af4f6a307079f8ef26c886d72559

@rogerchang23424 rogerchang23424 marked this pull request as draft April 24, 2024 03:20
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powerjg commented Apr 24, 2024

Can you give some context to this change? What is the problem it is fixing? Why did you take this approach? Etc.

@rogerchang23424 rogerchang23424 changed the title configs,cpu: Remove ISA dependent SimpleCPU, MinorCPU and O3CPU objects configs,cpu: Enable the config run in multi-ISA gem5 Apr 25, 2024
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rogerchang23424 commented Apr 25, 2024

Change the description in the title. The PR is mainly makes the config enable run in multi-ISA gem5. Still WIP

@giactra giactra self-requested a review April 25, 2024 08:22
@ivanaamit ivanaamit added configs gem5's Preprepared Python Configuration scripts. Typically found in "configs" cpu General gem5 CPU code (e.g., `BaseCPU`) labels May 14, 2024
In the PR, replace the CPU objects with ISA specified. Like O3CPU ->
X86O3CPU, TimingSimpleCPU -> RiscvTimingSimpleCPU.

Change-Id: I255a2d49b672af4f6a307079f8ef26c886d72559
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