A blinky project for the ULX3S v3.0.3 FPGA board
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Updated
Feb 16, 2019 - Verilog
A blinky project for the ULX3S v3.0.3 FPGA board
Z80 + USB + TinyFPGA-BX in Verilog using open-source Yosys+NextPNR
A possible replacement for openflow, which would be ideally contributed to the SymbiFlow project
Homebrew formulae for building FPGA bitstreams with open-source tools.
A nextpnr arch definition for the TuringTumble board game.
Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe
a collection of tools made while messing with the Colorlight 5A-75B V7.0 and some notes using ECP5 with Yosys
RealtimeIO for LinuxCNC based on an FPGA
FPGA tool performance profiling
Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our special Video Controller in Basys3 Artix7-35T. Complemented with SW in the bare-metal 'C' they, together, make for this classic game. Except that it's now, in the standard BiH tradition, with a twist of our own.
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