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cy8ckit-062s4

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This code example shows how to implement a littlefs file system for PSoC 6 devices using the mtb-littlefs MW library. The CE supports working with both SD card and QSPI NOR flash devices.

  • Updated Mar 28, 2024
  • C

This example demonstrates how to use the inter-processor communication (IPC) driver to implement a semaphore in PSoC 6 MCU. The semaphore is used to lock to control access to a resource shared by the CPUs and synchronize the initialization instructions.

  • Updated Mar 6, 2024
  • Makefile

This code example demonstrates CapSense® Component’s custom scanning through callback functions that allow altering the sensor parameters during run-time or synchronizing the CapSense scan with non-CapSense operations.

  • Updated Aug 10, 2023
  • C

This code example demonstrates how to create a CAPSENSE™ design using CM0 of PSoC™ 6 MCU, without utilizing CM4. This code example features CAPSENSE™ buttons, button 0 turns the LED ON and button 1 turns the LED OFF. This project uses the CAPSENSE™ Middleware Library.

  • Updated Mar 28, 2024
  • C

This example demonstrates interfacing with an external NOR flash memory in Quad-SPI mode using the Serial Memory Interface (SMIF) block in PSoC® 6 MCU. This example uses the Serial Flash Discoverable Parameters (SFDP) standard to auto-discover the flash parameters and the commands for read, program, and erase operations.

  • Updated Jun 5, 2023
  • C

This code example demonstrates how to create a low-power CapSense design using PSoC 6 MCU. This example features a 5-segment CapSense slider and a Ganged Sensor, and displays the detected touch position over the serial terminal.

  • Updated Mar 28, 2024
  • C

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