Client based system reset #200
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The feature enables the interface_rts signal from the CH552 MCU in constraints as well as inte FPGA interface. The signal is routed into the clk_reset_gen block where it is sampled. If the sampled signal is set, a system reset is triggered Signed-off-by: Joachim Strömbergson <joachim@assured.se>
Add comments to explain function and clean up heade, footer Signed-off-by: Joachim Strömbergson <joachim@assured.se>
The tk1 core is now able to handle external and internal reset request, trigger a system and store reset status that persists the reset. The reset status is exposed to SW as bits 17..16 in the FW_APP register. The fw_app status is now bound to bit 0. Signed-off-by: Joachim Strömbergson <joachim@assured.se>
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This feature adds the ability for the application FPGA to receive an external request to perform an internal HW reset, thereby return to FW mode and reboot. The feature also includes a reset persistent reset status, allowing the FW to determine the reason for the boot - cold boot or externally triggered boot.
The external signal is connected to the CH552 which, with an updated FW, will be able to receive a reset request from the client, and send it to the FPGA.
This fixes issue #199.