Add Verilog macro helpers to reduce duplication #91
abejgonzalezfiresim-non-aws-run-tests.yml
on: pull_request
filter-jobs-on-changes
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cancel-prior-workflows
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documentation-check
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cpp-lint
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check-conda-lock-modified
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run-vitis-check-docs-generated-components
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run-parallel-vcs-metasims-and-vitis-driver
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run-basic-linux-poweroff-vitis
0s
run-local-fpga-buildbitstream
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cleanup-local-fpga-repo
3s
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