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fix: S-interpolator for assert, assume and printf #3103

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@SingularityKChen SingularityKChen commented Oct 4, 2022

Related issue: chipsalliance/chisel#2751

Type of change: bug report

Impact: no functional change

Development Phase: implementation

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@SingularityKChen rebase to master plz

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LGTM, but I'm not so familiar with printf API, @jackkoenig for review&approve.

@SingularityKChen SingularityKChen changed the base branch from master to dev June 15, 2023 05:35
@sequencer sequencer self-requested a review June 15, 2023 05:51
assert(!q.enq.valid, s"ID ${i} should not be used")
chisel3.assert(!q.enq.valid, "ID ${i} should not be used")
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I don't think this is correct.

@@ -73,7 +73,8 @@ class TLPatternPusher(name: String, pattern: Seq[Pattern])(implicit p: Parameter
}

val (plegal, pbits) = pattern.map(_.bits(edgeOut)).unzip
assert (end || VecInit(plegal)(step), s"Pattern pusher ${name} tried to push an illegal request")
val msg = s"Pattern pusher $name tried to push an illegal request"
assert(end || Vec(plegal)(step), msg)
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VecInit?

Suggested change
assert(end || Vec(plegal)(step), msg)
assert(end || VecInit(plegal)(step), msg)

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