English | Русский
This project implements a bidirectional full-duplex transfer of ASCII characters between two Tang Nano 9K FPGAs, displaying the exchanged text on 0.96″ OLED screens (driver SSD1306) on both the master and slave devices.
In addition to the main functionality, the repository includes an implementation of bidirectional full-duplex transmission of 64-bit data. Files related to this feature are prefixed with 64
.
Note
This project uses the GOWIN SPI IP core.
You can find the official documentation on the GOWIN website and a Russian translation in the project’s docs
directory.
The project contains the following components:
- Source code for the master device (
master
) - Source code for the slave device (
slave
) - A testbench for verifying SPI interaction between devices (
testbench
)
Tip
For detailed descriptions of each component, see the README in the corresponding repository directories.
- GOWIN EDA IDE – development environment for Tang Nano FPGAs
- GOWIN SPI IP – IP core implementing SPI data transfer
- ModelSim – software for running and debugging testbenches
The message preloaded into the master’s firmware (in master/MASTER/src/m_top.v
, inside the Initial
block) is split into 8-bit blocks (one ASCII character each). Each block undergoes a 7-stage interaction with the SPI IP core, exchanging data with the slave. The received character is stored in a shift-register array that holds the full received message.
This array is continuously refreshed and rendered on the OLED display on each clock-edge. Transmission starts when the Send button is pressed and continues until the entire message (up to 64 characters, limited by screen size) has been sent.
The slave’s firmware works similarly but is simpler: it breaks its own 64-byte message into 8-bit blocks, loads the first block into a shift register, then waits for the master’s activity signal. Upon request, it exchanges the 8-bit data, and the received character is stored in its own display array, which is periodically updated.
Below are simulation results demonstrating the project in action.
Simulation sequence:
- Initialize buttons
- Wait 2 ms
- Reset master and slave modules
- Wait 6 ms
- Release reset buttons
- Wait 2 ms
- Press the Send button
- Wait 6 ms
- Release Send button
- Perform two additional transfers
- Reset again
- Transfer again
You will need:
- Two Tang Nano 9K development boards
- Two 0.96″ OLED displays (driver SSD1306)
Wire the components as shown:
Warning
The boards are connected by six wires (SPI lines, 5 V, and GND). For proper SPI operation, their clock generators must be synchronized, so only one board should be powered from an external supply.
Install and configure GOWIN EDA IDE by following the official SiPEED guide.
- Clone the repository:
git clone https://github.com/alecproj/circuit-spi-display.git
- Open
master/MASTER/MASTER.gprj
in GOWIN EDA and program the first board (master). - Open
slave/SLAVE/SLAVE.gprj
and program the second board (slave).
Note
To rebuild the GOWIN SPI IP core, see Building the GOWIN SPI IP core.
- Press S2 on both boards to reset the FPGAs.
- Press S1 on the master to start the bidirectional transfer.
The slave’s display will show the master’s message (default "FROM MASTER"
), and the master’s display will show the slave’s message (default "FROM SLAVE"
).
To simulate without hardware, install ModelSim from the official Intel site. Then follow the simulation instructions.