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opt: Single-step execution performance optimization #908

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Merged
merged 1 commit into from
Jul 3, 2025

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xiaokamikami
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When executing in single-step mode, a simplified version of tcache is introduced to enhance the execution efficiency of instructions. In the ref mode, the performance of NEMU.so has increased from 5 MHz/s to 9 MHz/s.

@xiaokamikami xiaokamikami requested a review from cebarobot June 24, 2025 06:00
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Nice job!

From my understanding, this PR introduces a simple tcache for !PERF_OPT. It would be better to have choice between tcache, simple tcache and no tcache, but this can be left for the future.

@xiaokamikami xiaokamikami merged commit c503e7a into master Jul 3, 2025
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@xiaokamikami xiaokamikami deleted the perf_share branch July 3, 2025 02:01
Tang-Haojin pushed a commit to OpenXiangShan/XiangShan that referenced this pull request Jul 22, 2025
* NEMU commit: bae4d4a1efdf343dd0737ff306263a3f445efb91
* NEMU configs:
	* riscv64-xs-ref_defconfig
	* riscv64-dual-xs-ref_defconfig
	* riscv64-xs-ref-debug_defconfig
	* riscv64-dual-xs-ref-debug_defconfig
	* riscv64-xs-ref_bitmap_defconfig

Including:
* OpenXiangShan/NEMU#908
* OpenXiangShan/NEMU#907
* OpenXiangShan/NEMU#912
* OpenXiangShan/NEMU#911
* OpenXiangShan/NEMU#914
* OpenXiangShan/NEMU#915
* OpenXiangShan/NEMU#916
* OpenXiangShan/NEMU#917
good-circle pushed a commit to OpenXiangShan/XiangShan that referenced this pull request Jul 25, 2025
* NEMU commit: bae4d4a1efdf343dd0737ff306263a3f445efb91
* NEMU configs:
	* riscv64-xs-ref_defconfig
	* riscv64-dual-xs-ref_defconfig
	* riscv64-xs-ref-debug_defconfig
	* riscv64-dual-xs-ref-debug_defconfig
	* riscv64-xs-ref_bitmap_defconfig

Including:
* OpenXiangShan/NEMU#908
* OpenXiangShan/NEMU#907
* OpenXiangShan/NEMU#912
* OpenXiangShan/NEMU#911
* OpenXiangShan/NEMU#914
* OpenXiangShan/NEMU#915
* OpenXiangShan/NEMU#916
* OpenXiangShan/NEMU#917
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2 participants