Pinned

1. dvsd_pe_sky130 dvsd_pe_sky130 Public

   This project produces a clean GDSII Layout with all its details that are used to print photomasks used in the fabrication of a behavioral RTL of an 8-bit Priority Encoder, using SkyWater 130 nm PDK.

   Verilog 12 3

2. caravel_vsd_priority_encoder caravel_vsd_priority_encoder Public

   Forked from efabless/caravel_user_project

   https://caravel-user-project.readthedocs.io

   Verilog 1

3. skywater-pdk skywater-pdk Public

   Forked from google/skywater-pdk

   Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

   Python

4. vsdflow vsdflow Public

   Forked from kunalg123/vsdflow

   VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft their ideas in RTL language, and convert the design to hardware using…

   Verilog 2

5. PLL_OSU180_Workshop PLL_OSU180_Workshop Public

   On-Chip Clock Multiplier (PLL) on OSU180 Workshop

   SourcePawn