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1. nasscom-vsd-soc-design-workshop nasscom-vsd-soc-design-workshop Public

   2 Week SoC DIgital VLSI Workshop

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2. RTL_Code_Verilog RTL_Code_Verilog Public

   Basic building block of the digital circuit is written in verilog like half adder. full adder, multiplexer,flipflops of various configurations, and other synchrounous circuits

3. vsdstdcelldesign vsdstdcelldesign Public

   Forked from nickson-jose/vsdstdcelldesign

   This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedures on how to create a custom LEF file and plugging it into an…

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4. soc-design-and-planning-nasscom-vsd soc-design-and-planning-nasscom-vsd Public

   Forked from fayizferosh/soc-design-and-planning-nasscom-vsd

   2 Week digital VLSI SoC design and planning workshop with complete RTL2GDSII flow organised by VSD in collaboration with NASSCOM (Advanced Physical Design using OpenLANE/Sky130)

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5. video_display_processor video_display_processor Public

   Final Year Project Performed at Shri Mata Vaishno Devi University

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6. DSAx30_Akshit DSAx30_Akshit Public

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