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Source code for various Verilog-based projects and assignments

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verilog-assignments

Source code for various assignments that required Verilog-based design.

Each of these projects can be simulated using either Xilinx Vivado or EDA Playground.

Projects

  • Combinational Logic Design: A combinational circuit which counts the coins placed into a toll collector. Implemented on the XC7A100T-1CSG324C Xlinx FPGA Board.

  • Serial Sequence Controller: A controller that detects the 4-bit, binary MSB sequence of a certain integer (i.e. 6). Implemented on the Nexys4 DDR™ FPGA Board.

  • 64 Bit Adder Implementations: Three different implementations of a 64-bit adder using ripple-carry and 2-bit look ahead adders, in addition to a behavioral design.

  • ARM ALU Behavioral: A bottoms-up behavioral implementation of a simple ALU that uses six 4-bit controls and two operands.

License

MIT © Alex Benasutti

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Source code for various Verilog-based projects and assignments

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