Upload TARGET_CY8CPROTO-063-BLE 1.2.0.13071

Infineon · Mar 27, 2020 · 6e67634 · 6e67634
1 parent b58e59f
commit 6e67634
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Showing 52 changed files with 514 additions and 827 deletions.
diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c
@@ -4,8 +4,8 @@
 * Description:
 * Wrapper function to initialize all generated code.
 * This file was automatically generated and should not be modified.
-* cfg-backend-cli: 1.2.0.1478
-* Device Support Library (../../../../output/psoc6/psoc6pdl): 1.4.0.1571
+* Device Configurator: 2.0.0.1483
+* Device Support Library (libs/psoc6pdl): 1.4.1.2240
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation
@@ -29,7 +29,6 @@
 void init_cycfg_all(void)
 {
 	init_cycfg_system();
-	init_cycfg_clocks();
 	init_cycfg_routing();
 	init_cycfg_peripherals();
 	init_cycfg_pins();

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.h b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.h
@@ -4,8 +4,8 @@
 * Description:
 * Simple wrapper header containing all generated files.
 * This file was automatically generated and should not be modified.
-* cfg-backend-cli: 1.2.0.1478
-* Device Support Library (../../../../output/psoc6/psoc6pdl): 1.4.0.1571
+* Device Configurator: 2.0.0.1483
+* Device Support Library (libs/psoc6pdl): 1.4.1.2240
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation
@@ -33,7 +33,6 @@ extern "C" {
 
 #include "cycfg_notices.h"
 #include "cycfg_system.h"
-#include "cycfg_clocks.h"
 #include "cycfg_routing.h"
 #include "cycfg_peripherals.h"
 #include "cycfg_pins.h"

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.timestamp b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.timestamp
@@ -4,8 +4,8 @@
 * Description:
 * Sentinel file for determining if generated source is up to date.
 * This file was automatically generated and should not be modified.
-* cfg-backend-cli: 1.2.0.1478
-* Device Support Library (../../../../output/psoc6/psoc6pdl): 1.4.0.1571
+* Device Configurator: 2.0.0.1483
+* Device Support Library (libs/psoc6pdl): 1.4.1.2240
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c
diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.h b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.h
diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_notices.h b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_notices.h
@@ -5,8 +5,8 @@
 * Contains warnings and errors that occurred while generating code for the
 * design.
 * This file was automatically generated and should not be modified.
-* cfg-backend-cli: 1.2.0.1478
-* Device Support Library (../../../../output/psoc6/psoc6pdl): 1.4.0.1571
+* Device Configurator: 2.0.0.1483
+* Device Support Library (libs/psoc6pdl): 1.4.1.2240
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c
@@ -4,8 +4,8 @@
 * Description:
 * Peripheral Hardware Block configuration
 * This file was automatically generated and should not be modified.
-* cfg-backend-cli: 1.2.0.1478
-* Device Support Library (../../../../output/psoc6/psoc6pdl): 1.4.0.1571
+* Device Configurator: 2.0.0.1483
+* Device Support Library (libs/psoc6pdl): 1.4.1.2240
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation
@@ -27,7 +27,7 @@
 #include "cycfg_peripherals.h"
 
 #if defined (CY_USING_HAL)
-	const cyhal_resource_inst_t CYBSP_BLE_obj = 
+	const cyhal_resource_inst_t CYBSP_BLE_obj =
 	{
 		.type = CYHAL_RSC_BLESS,
 		.block_num = 0U,

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.h b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.h
@@ -4,8 +4,8 @@
 * Description:
 * Peripheral Hardware Block configuration
 * This file was automatically generated and should not be modified.
-* cfg-backend-cli: 1.2.0.1478
-* Device Support Library (../../../../output/psoc6/psoc6pdl): 1.4.0.1571
+* Device Configurator: 2.0.0.1483
+* Device Support Library (libs/psoc6pdl): 1.4.1.2240
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c
@@ -4,8 +4,8 @@
 * Description:
 * Pin configuration
 * This file was automatically generated and should not be modified.
-* cfg-backend-cli: 1.2.0.1478
-* Device Support Library (../../../../output/psoc6/psoc6pdl): 1.4.0.1571
+* Device Configurator: 2.0.0.1483
+* Device Support Library (libs/psoc6pdl): 1.4.1.2240
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation
@@ -26,7 +26,7 @@
 
 #include "cycfg_pins.h"
 
-const cy_stc_gpio_pin_config_t WCO_IN_config = 
+const cy_stc_gpio_pin_config_t WCO_IN_config =
 {
 	.outVal = 1,
 	.driveMode = CY_GPIO_DM_ANALOG,
@@ -43,14 +43,14 @@ const cy_stc_gpio_pin_config_t WCO_IN_config =
 	.vohSel = 0UL,
 };
 #if defined (CY_USING_HAL)
-	const cyhal_resource_inst_t WCO_IN_obj = 
+	const cyhal_resource_inst_t WCO_IN_obj =
 	{
 		.type = CYHAL_RSC_GPIO,
 		.block_num = WCO_IN_PORT_NUM,
 		.channel_num = WCO_IN_PIN,
 	};
 #endif //defined (CY_USING_HAL)
-const cy_stc_gpio_pin_config_t WCO_OUT_config = 
+const cy_stc_gpio_pin_config_t WCO_OUT_config =
 {
 	.outVal = 1,
 	.driveMode = CY_GPIO_DM_ANALOG,
@@ -67,14 +67,14 @@ const cy_stc_gpio_pin_config_t WCO_OUT_config =
 	.vohSel = 0UL,
 };
 #if defined (CY_USING_HAL)
-	const cyhal_resource_inst_t WCO_OUT_obj = 
+	const cyhal_resource_inst_t WCO_OUT_obj =
 	{
 		.type = CYHAL_RSC_GPIO,
 		.block_num = WCO_OUT_PORT_NUM,
 		.channel_num = WCO_OUT_PIN,
 	};
 #endif //defined (CY_USING_HAL)
-const cy_stc_gpio_pin_config_t SWDIO_config = 
+const cy_stc_gpio_pin_config_t SWDIO_config =
 {
 	.outVal = 1,
 	.driveMode = CY_GPIO_DM_PULLUP,
@@ -91,14 +91,14 @@ const cy_stc_gpio_pin_config_t SWDIO_config =
 	.vohSel = 0UL,
 };
 #if defined (CY_USING_HAL)
-	const cyhal_resource_inst_t SWDIO_obj = 
+	const cyhal_resource_inst_t SWDIO_obj =
 	{
 		.type = CYHAL_RSC_GPIO,
 		.block_num = SWDIO_PORT_NUM,
 		.channel_num = SWDIO_PIN,
 	};
 #endif //defined (CY_USING_HAL)
-const cy_stc_gpio_pin_config_t SWCLK_config = 
+const cy_stc_gpio_pin_config_t SWCLK_config =
 {
 	.outVal = 1,
 	.driveMode = CY_GPIO_DM_PULLDOWN,
@@ -115,7 +115,7 @@ const cy_stc_gpio_pin_config_t SWCLK_config =
 	.vohSel = 0UL,
 };
 #if defined (CY_USING_HAL)
-	const cyhal_resource_inst_t SWCLK_obj = 
+	const cyhal_resource_inst_t SWCLK_obj =
 	{
 		.type = CYHAL_RSC_GPIO,
 		.block_num = SWCLK_PORT_NUM,

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.h b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.h
@@ -4,8 +4,8 @@
 * Description:
 * Pin configuration
 * This file was automatically generated and should not be modified.
-* cfg-backend-cli: 1.2.0.1478
-* Device Support Library (../../../../output/psoc6/psoc6pdl): 1.4.0.1571
+* Device Configurator: 2.0.0.1483
+* Device Support Library (libs/psoc6pdl): 1.4.1.2240
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation
@@ -57,7 +57,7 @@ extern "C" {
 	#define WCO_IN_HAL_IRQ CYHAL_GPIO_IRQ_NONE
 #endif //defined (CY_USING_HAL)
 #if defined (CY_USING_HAL)
-	#define WCO_IN_HAL_DIR CYHAL_GPIO_DIR_INPUT 
+	#define WCO_IN_HAL_DIR CYHAL_GPIO_DIR_INPUT
 #endif //defined (CY_USING_HAL)
 #if defined (CY_USING_HAL)
 	#define WCO_IN_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
@@ -81,7 +81,7 @@ extern "C" {
 	#define WCO_OUT_HAL_IRQ CYHAL_GPIO_IRQ_NONE
 #endif //defined (CY_USING_HAL)
 #if defined (CY_USING_HAL)
-	#define WCO_OUT_HAL_DIR CYHAL_GPIO_DIR_INPUT 
+	#define WCO_OUT_HAL_DIR CYHAL_GPIO_DIR_INPUT
 #endif //defined (CY_USING_HAL)
 #if defined (CY_USING_HAL)
 	#define WCO_OUT_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
@@ -105,7 +105,7 @@ extern "C" {
 	#define SWDIO_HAL_IRQ CYHAL_GPIO_IRQ_NONE
 #endif //defined (CY_USING_HAL)
 #if defined (CY_USING_HAL)
-	#define SWDIO_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL 
+	#define SWDIO_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL
 #endif //defined (CY_USING_HAL)
 #if defined (CY_USING_HAL)
 	#define SWDIO_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_PULLUP
@@ -129,7 +129,7 @@ extern "C" {
 	#define SWCLK_HAL_IRQ CYHAL_GPIO_IRQ_NONE
 #endif //defined (CY_USING_HAL)
 #if defined (CY_USING_HAL)
-	#define SWCLK_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL 
+	#define SWCLK_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL
 #endif //defined (CY_USING_HAL)
 #if defined (CY_USING_HAL)
 	#define SWCLK_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_PULLDOWN

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.c b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.c
@@ -4,8 +4,8 @@
 * Description:
 * Establishes all necessary connections between hardware elements.
 * This file was automatically generated and should not be modified.
-* cfg-backend-cli: 1.2.0.1478
-* Device Support Library (../../../../output/psoc6/psoc6pdl): 1.4.0.1571
+* Device Configurator: 2.0.0.1483
+* Device Support Library (libs/psoc6pdl): 1.4.1.2240
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.h b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.h
@@ -4,8 +4,8 @@
 * Description:
 * Establishes all necessary connections between hardware elements.
 * This file was automatically generated and should not be modified.
-* cfg-backend-cli: 1.2.0.1478
-* Device Support Library (../../../../output/psoc6/psoc6pdl): 1.4.0.1571
+* Device Configurator: 2.0.0.1483
+* Device Support Library (libs/psoc6pdl): 1.4.1.2240
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation