Upload TARGET_CY8CPROTO-063-BLE 1.3.0.15346

Infineon · Jun 25, 2020 · 4183ad0 · 4183ad0
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Showing 41 changed files with 1,088 additions and 433 deletions.
diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c
@@ -4,8 +4,8 @@
 * Description:
 * Wrapper function to initialize all generated code.
 * This file was automatically generated and should not be modified.
-* Device Configurator: 2.0.0.1483
-* Device Support Library (libs/psoc6pdl): 1.4.1.2240
+* cfg-backend-cli: 1.2.0.1483
+* Device Support Library (libs/psoc6pdl): 1.6.0.4266
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.h b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.h
@@ -4,8 +4,8 @@
 * Description:
 * Simple wrapper header containing all generated files.
 * This file was automatically generated and should not be modified.
-* Device Configurator: 2.0.0.1483
-* Device Support Library (libs/psoc6pdl): 1.4.1.2240
+* cfg-backend-cli: 1.2.0.1483
+* Device Support Library (libs/psoc6pdl): 1.6.0.4266
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.timestamp b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.timestamp
@@ -4,8 +4,8 @@
 * Description:
 * Sentinel file for determining if generated source is up to date.
 * This file was automatically generated and should not be modified.
-* Device Configurator: 2.0.0.1483
-* Device Support Library (libs/psoc6pdl): 1.4.1.2240
+* cfg-backend-cli: 1.2.0.1483
+* Device Support Library (libs/psoc6pdl): 1.6.0.4266
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_notices.h b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_notices.h
@@ -5,8 +5,8 @@
 * Contains warnings and errors that occurred while generating code for the
 * design.
 * This file was automatically generated and should not be modified.
-* Device Configurator: 2.0.0.1483
-* Device Support Library (libs/psoc6pdl): 1.4.1.2240
+* cfg-backend-cli: 1.2.0.1483
+* Device Support Library (libs/psoc6pdl): 1.6.0.4266
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c
@@ -4,8 +4,8 @@
 * Description:
 * Peripheral Hardware Block configuration
 * This file was automatically generated and should not be modified.
-* Device Configurator: 2.0.0.1483
-* Device Support Library (libs/psoc6pdl): 1.4.1.2240
+* cfg-backend-cli: 1.2.0.1483
+* Device Support Library (libs/psoc6pdl): 1.6.0.4266
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.h b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.h
@@ -4,8 +4,8 @@
 * Description:
 * Peripheral Hardware Block configuration
 * This file was automatically generated and should not be modified.
-* Device Configurator: 2.0.0.1483
-* Device Support Library (libs/psoc6pdl): 1.4.1.2240
+* cfg-backend-cli: 1.2.0.1483
+* Device Support Library (libs/psoc6pdl): 1.6.0.4266
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c
@@ -4,8 +4,8 @@
 * Description:
 * Pin configuration
 * This file was automatically generated and should not be modified.
-* Device Configurator: 2.0.0.1483
-* Device Support Library (libs/psoc6pdl): 1.4.1.2240
+* cfg-backend-cli: 1.2.0.1483
+* Device Support Library (libs/psoc6pdl): 1.6.0.4266
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.h b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.h
@@ -4,8 +4,8 @@
 * Description:
 * Pin configuration
 * This file was automatically generated and should not be modified.
-* Device Configurator: 2.0.0.1483
-* Device Support Library (libs/psoc6pdl): 1.4.1.2240
+* cfg-backend-cli: 1.2.0.1483
+* Device Support Library (libs/psoc6pdl): 1.6.0.4266
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation
@@ -53,6 +53,9 @@ extern "C" {
 #if defined (CY_USING_HAL)
 	#define WCO_IN_HAL_PORT_PIN P0_0
 #endif //defined (CY_USING_HAL)
+#if defined (CY_USING_HAL)
+	#define WCO_IN P0_0
+#endif //defined (CY_USING_HAL)
 #if defined (CY_USING_HAL)
 	#define WCO_IN_HAL_IRQ CYHAL_GPIO_IRQ_NONE
 #endif //defined (CY_USING_HAL)
@@ -77,6 +80,9 @@ extern "C" {
 #if defined (CY_USING_HAL)
 	#define WCO_OUT_HAL_PORT_PIN P0_1
 #endif //defined (CY_USING_HAL)
+#if defined (CY_USING_HAL)
+	#define WCO_OUT P0_1
+#endif //defined (CY_USING_HAL)
 #if defined (CY_USING_HAL)
 	#define WCO_OUT_HAL_IRQ CYHAL_GPIO_IRQ_NONE
 #endif //defined (CY_USING_HAL)
@@ -101,6 +107,9 @@ extern "C" {
 #if defined (CY_USING_HAL)
 	#define SWDIO_HAL_PORT_PIN P6_6
 #endif //defined (CY_USING_HAL)
+#if defined (CY_USING_HAL)
+	#define SWDIO P6_6
+#endif //defined (CY_USING_HAL)
 #if defined (CY_USING_HAL)
 	#define SWDIO_HAL_IRQ CYHAL_GPIO_IRQ_NONE
 #endif //defined (CY_USING_HAL)
@@ -125,6 +134,9 @@ extern "C" {
 #if defined (CY_USING_HAL)
 	#define SWCLK_HAL_PORT_PIN P6_7
 #endif //defined (CY_USING_HAL)
+#if defined (CY_USING_HAL)
+	#define SWCLK P6_7
+#endif //defined (CY_USING_HAL)
 #if defined (CY_USING_HAL)
 	#define SWCLK_HAL_IRQ CYHAL_GPIO_IRQ_NONE
 #endif //defined (CY_USING_HAL)

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.c b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.c
@@ -4,8 +4,8 @@
 * Description:
 * Establishes all necessary connections between hardware elements.
 * This file was automatically generated and should not be modified.
-* Device Configurator: 2.0.0.1483
-* Device Support Library (libs/psoc6pdl): 1.4.1.2240
+* cfg-backend-cli: 1.2.0.1483
+* Device Support Library (libs/psoc6pdl): 1.6.0.4266
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation

diff --git a/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.h b/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.h
@@ -4,8 +4,8 @@
 * Description:
 * Establishes all necessary connections between hardware elements.
 * This file was automatically generated and should not be modified.
-* Device Configurator: 2.0.0.1483
-* Device Support Library (libs/psoc6pdl): 1.4.1.2240
+* cfg-backend-cli: 1.2.0.1483
+* Device Support Library (libs/psoc6pdl): 1.6.0.4266
 *
 ********************************************************************************
 * Copyright 2017-2019 Cypress Semiconductor Corporation