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Shift Register (formerly Turing)

Chysn edited this page Dec 21, 2019 · 10 revisions

https://youtu.be/RNWCq8mW5wE

ShiftReg ("Turing" prior to v1.4C) is a faithful implementation based on Tom Whitwell's original Turing Machine circuit.

Controls

  • Digital Ins: A clock at Digital 1 shifts all bits left, after performing a probability calculation to determine whether the last bit should flip. A gate signal at Digital 2 unlocks probability changes.
  • CV Inputs: CV 1 sets the length. CV 2 is bi-polar modulation of probability.
  • Outputs: A/C is quantized output based on 5 bits, and B/D is voltage output based on 8 bits
  • Encoder Push: Cycles cursor between Length and Probability settings
  • Encoder Turn: Change the selected setting

ShiftReg starts out with a random 16-bit register. The synthesist sets the pattern length and probability.

When a clock is received at digital input 1, ShiftReg determines whether to change the value of the last bit in the pattern (bit length - 1) based on the set probability. At a probability of 0, the bit will never be changed, and at a probability of 100, the bit will always be changed. The entire 16-bit register is shifted, and the last bit's newly-calculated state is added to bit 0.

Note that the old Turing Machine trick of getting a repeating 32-step pattern with a 100% probability is possible here.

The sequence may be "frozen" by setting the probability to 0, or by moving the cursor to the Length setting. When the cursor is at the Length setting, the sequence will not change unless a high gate signal is present at Digital 2. *

ShiftReg has two outputs. The first output is quantized to semitones over a 2.5 octave (32-note) range, and uses the first five bits of the register. The second output uses the first 8 bits of the register, and is proportioned to 5 volts. This output is similar to the output of the original Turing Machine.

* Fun tip! To have total control over when a sequence is changed, set probability to 100%, then move the cursor to the length parameter to lock the probability. Now a high gate signal at Digital 2 will always flip bit 0.