This repository contains the test and main models for the simulation of PMSM motors on the IO334 FPGA module. Models in hil folders require hardware interfacing via the I/O box or IO3XX-21 rear plugin to be able to run the model properly, while models in sim folders are entirely software-based simulations.
For both hardware-in-the-loop (HIL) and software simulation, run the corresponding Simulink Real-Time (SLRT) model located the the folder pmsm_fpga. For the HIL version, an embedded controller is required to drive the PMSM. The pin and analog output mappings are listed below:
IO3XX-21 rear plugin
Inports:
- Pin 1 - TTL_CAP_A
- Pin 2 - TTL_CAP_B
- Pin 3 - TTL_CAP_C
Outports:
- Pin 10 - TTL_QAE_A
- Pin 11 - TTL_QAE_B
- Pin 12 - TTL_QAE_C
IO334 I/O box
- AO Channel 1 - DAC_ia
- AO Channel 2 - DAC_ib
- AO Channel 3 - DAC_ic
RJ45 Pin Mapping:
- Pin 2 - AO Channel 1
- Pin 6 - AO Channel 2
- Pin 5 - AO Channel 3
Use RJ45 pins 1, 3, 4, or 7 for ground.
The current values within the Simulink model has a 1:1 ratio with amperage. Due to the FPGA analog output channel being 16-bit, the current values have been upscaled by a factor of 8 to preserve precision during their conversion from a double to int16 data type. Additionally, the analog output has a voltage range of ±10 V. Therefore, the current values have been scaled proportionally to project a voltage range of 0–3.3 V in order to accommodate the operating voltage range of a typical microcontroller.
In order to get the correct current readings of the motor from the analog output, the voltage values have to be mapped from 0–3.3 V to -32768–32767, followed by a divison of 8.