Libero v12.6 designs - v1.0

Updated to support Libero v12.6

This release features:

• Tcl scripts updated to Libero v12.6
• FPGA part number in the scripts corrected from 'T' to 'TS'
• Production Silicon temperature rating set to IND. ES remains as EXT.
• MIV_RV32IMC updated to MIV_RV32 v3.0
• PF_INIT_Monitor component updated to v2.0.203
• PF_SRAM updated to v1.2.108
• Libero cores used in the design are downloaded automatically using the scripts.
• Updated programming files

Libero v12.4 designs - v1.0

Updated to support Libero v12.4

This release features:

• Updated design components for Libero SoC v12.4
• Added new MIV_RV32IMC design
• Added new MIV_RV32IMAF_L1_AHB design

Libero v12.3 designs - v1.0

Updated to support Libero 12.3

Libero v12.1 designs - v1.0

First release of Libero Tcl flow designs

Libero v12.1 designs - v0.2

• Adds AXI option. So now offers both AHB + AXI bus designs.
• Provides separate ES and non ES designs
• Moves FlashPro Express projects to a separate sub-folder.

Libero v12.1 designs - v0.1

Initial conversion of designs to Libero Tcl flow