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Updated to latest fpga_cores
Unit tests #192: Commit 3e3af09 pushed by suoto
May 1, 2023 08:35 57m 58s master
May 1, 2023 08:35 57m 58s
Updated to latest fpga_cores
Synthesis #8: Commit 3e3af09 pushed by suoto
May 1, 2023 08:35 1m 28s master
May 1, 2023 08:35 1m 28s
Changed metadata format to align with ETSI EN 302 307-1 Appendix I.2 …
Synthesis #7: Commit 8391c5a pushed by suoto
April 30, 2023 22:42 1m 30s master
April 30, 2023 22:42 1m 30s
Changed metadata format to align with ETSI EN 302 307-1 Appendix I.2 …
Unit tests #191: Commit 8391c5a pushed by suoto
April 30, 2023 22:42 3m 58s master
April 30, 2023 22:42 3m 58s
Change metadata format
Synthesis #6: Pull request #19 reopened by suoto
April 30, 2023 22:40 1m 27s change_metadata_format
April 30, 2023 22:40 1m 27s
Change metadata format
Unit tests #190: Pull request #19 reopened by suoto
April 30, 2023 22:40 3m 11s change_metadata_format
April 30, 2023 22:40 3m 11s
Change metadata format
Synthesis #5: Pull request #19 opened by suoto
April 30, 2023 21:33 1m 29s change_metadata_format
April 30, 2023 21:33 1m 29s
Change metadata format
Unit tests #189: Pull request #19 opened by suoto
April 30, 2023 21:33 56m 0s change_metadata_format
April 30, 2023 21:33 56m 0s
Updating fpga_cores version
Synthesis #4: Commit a192dfa pushed by suoto
April 30, 2023 20:08 1m 50s change_metadata_format
April 30, 2023 20:08 1m 50s
Updating fpga_cores version
Unit tests #188: Commit a192dfa pushed by suoto
April 30, 2023 20:08 1h 14m 30s change_metadata_format
April 30, 2023 20:08 1h 14m 30s
Extracting input config port for debugging
Synthesis #3: Commit a22203f pushed by suoto
March 25, 2023 17:49 32s change_metadata_format
March 25, 2023 17:49 32s