32BitMIPSProcessor

Lucas Cunha Peres Rodrigues Revisão de um Processador MIPS usando verilogo com as funcionalidades encapsuladas

A 32-bit MIPS processor developed in Verilog for the Hardware Lab course at IIT Patna.

To run the processor, use the following commands:

iverilog *.v

./a.out

Name		Name	Last commit message	Last commit date
Latest commit History 2 Commits
ControlALU.v		ControlALU.v
README.md		README.md
adder.v		adder.v
alu.v		alu.v
and.v		and.v
clock.v		clock.v
control.v		control.v
datamemory.v		datamemory.v
gates.v		gates.v
instructionmemory.v		instructionmemory.v
mu2.v		mu2.v
mux32.v		mux32.v
mux5.v		mux5.v
pc.v		pc.v
registerfile.v		registerfile.v
signextendshift.v		signextendshift.v
splitter.v		splitter.v
tb.v		tb.v

Nevermre/Verilog-Mips-ufv-Lucas-Peres