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boards: nxp: frdm_mcxn947: enable USDHC0 #72601
boards: nxp: frdm_mcxn947: enable USDHC0 #72601
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Some USDHC IP instances do not have the voltage control bit present, as they can only operate at 3.3V. Move code to select 1.8V mode into a separate helper, and guard the call to UDSHC_SelectVoltage() behind a feature macro from MCUX SDK. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Remove function for waiting for clock gate, as this is not used anywhere within the USDHC driver. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Some instances of the USDHC peripheral take longer to reset, and will timeout with the previous delay of 100 cycles. Extend this delay to 1000 cycles to resolve this. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add USDHC0 node to the mcxn94x devicetree. This node describes the one instance of the Ultra Secured Digital Host Controller IP present on the MCXN94x series SOCs. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for USDHC0 controller on FRDM_MCXN947 board. This support was verified using the `tests/subsys/sd/sdmmc` and `tests/subsys/sd/sdio` testcases. Note that this board does not ship with the SD header (J12) populated by default, so the user must populate one. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Reassigning to @dleach02, as this PR only touches NXP drivers/hardware |
if SD_STACK | ||
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# SD stack requires larger main stack size | ||
config MAIN_STACK_SIZE |
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meaning "for most in tree samples" it needs a larger main stack size?
@@ -159,6 +159,14 @@ static void card_detect_gpio_cb(const struct device *port, | |||
} | |||
} | |||
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static void imx_usdhc_select_1_8v(USDHC_Type *base, bool enable_1_8v) | |||
{ |
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does this give no warning about empty body?
Enable support for USDHC0 sd host controller on FRDM_MCXN947. This support was verified with
tests/subsys/sd/sdmmc
, andtests/subsys/sd/sdio