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Added support for S32K142 SoC #382
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This update includes the definitions of clock configurations for the drivers of the S32K142. The file is based on the S32K146 and was manually curated to include only the subset of peripherals that are available on this SoC. Signed-off-by: Victor Chavez <vchavezb@protonmail.com>
These additions should be preferrably pushed to zephyr upstream but I am not a mantainer of the NXP SoCs. I am commiting this for the sake of convenience. If NXP is interested in supporting the S32K142 feel free to use this commit and push these files to zephyr upstream. Signed-off-by: Victor Chavez <vchavezb@protonmail.com>
Definition of ADC peripherals and modification of register CV as two separate members (required by mcux-adc12 driver). Signed-off-by: Victor Chavez <vchavezb@protonmail.com>
I have tested the FlexNVM as EEPROM in a separate branch here https://github.com/vChavezB/hal_nxp/tree/s32k142_flash The reason I did not add it in this PR is because I find it kind of hacky. I found out after digging the SDK drivers for the S32K142 that there are some features that are not part of this SOC, e.g. Read resources command. So I had to add some ugly ifdef macros in the flash drivers. As I am not an expert in the S32K1 family, I just give this as a reference in case NXP wants to correctly make the flash drivers portable as I do not know which other SoCs from the S32 family have these sort of compatibility problems. I also made a driver with the zephyr eeprom api. Its a quick and dirty solution hence I do not publish it. I see there is a lot of work to be done with conditional Macros and binding to KConfig to correctly set the EEPROM Size,etc. Feel free to use this code as inspiration to add support for EEPROM (FlexNVM) with the S32K1 SoCs. |
Incorrect nvic was defined for adc1 Signed-off-by: Victor Chavez <vchavezb@protonmail.com>
Hi @vChavezB , thanks for your contribution and apologies for the delayed review. Unfortunately we would need to have a board definition in zephyr upstream to be able to test your changes (e.g. S32K142EVB), otherwise this patch cannot be tested and merged. I had a look to your changes and it needs some refactoring: SoC clock headers and devicetree sources must reside in zephyr main tree, not on this repo; configuration code generated with S32DS IDE normally goes through a clean up and adaptation for zephyr; modifications of peripheral headers must keep compatibility with other devices. So far, NXP is taking care of introducing NXP SoC support for S32 as we are building up the needed ecosystem, so apologies if there is lack of documentation in some areas. If you are able to add S32K142EVB board support to test this patch and get this through eventually, we are happy to review. Otherwise, I would suggest NXP can continue from here based on the company priorities. |
Hi @manuargue, thanks for the feedback. Yes it would be better to have a definition for the dev kit to test the changes. Adding the board definition should not be complicated but I do not have one at hand as I am working with custom boards. If I have some spare time I will try to make a PR in zephyr upstream. Just as additional comment it would be nice to have integration of the zephyr flash and eeprom api (i.e. PFLASH, FlexNVM). |
Ok. If you are not planning to work on this patch to make it mergeable in the near future, I'd suggest better to close it and reopen it when is ready for review based on the feedback provided above.
Please log a feature request in zephyr to keep track of it. Thanks |
This PR addreses the S32K142 SoC. My motivation was that I need to develop a project with a custom board and I thought why not use Zephyr instead. The changes are based on the S32K146 SoC, thanks a lot for that !
So far I have tested FTM, FlexCAN, and GPIOs.
Unfortunately I do not have a board definition as I cannot release what I am working on. Hence the Clock configuration is based on an external 40 MHz clock (SPLL).
In addition had to delete some definitions and manually make sure that by deleting definitions the Look up tables for clock tables,etc. work.
Hope it helps !