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Merge remote-tracking branch 'stable/linux-6.8.y' into v6.8+
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xdevs23 committed May 2, 2024
2 parents c8765ac + f3d6143 commit f2eecad
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Showing 229 changed files with 2,385 additions and 1,506 deletions.
5 changes: 5 additions & 0 deletions Documentation/admin-guide/sysctl/net.rst
Expand Up @@ -206,6 +206,11 @@ Will increase power usage.

Default: 0 (off)

mem_pcpu_rsv
------------

Per-cpu reserved forward alloc cache size in page units. Default 1MB per CPU.

rmem_default
------------

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5 changes: 1 addition & 4 deletions Documentation/devicetree/bindings/eeprom/at24.yaml
Expand Up @@ -68,14 +68,10 @@ properties:
pattern: cs16$
- items:
pattern: c32$
- items:
pattern: c32d-wl$
- items:
pattern: cs32$
- items:
pattern: c64$
- items:
pattern: c64d-wl$
- items:
pattern: cs64$
- items:
Expand Down Expand Up @@ -136,6 +132,7 @@ properties:
- renesas,r1ex24128
- samsung,s524ad0xd1
- const: atmel,24c128
- pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st

label:
description: Descriptive name of the EEPROM.
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2 changes: 1 addition & 1 deletion Makefile
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 8
SUBLEVEL = 8
SUBLEVEL = 9
EXTRAVERSION =
NAME = Hurr durr I'ma ninja sloth

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8 changes: 8 additions & 0 deletions arch/Kconfig
Expand Up @@ -9,6 +9,14 @@
#
source "arch/$(SRCARCH)/Kconfig"

config ARCH_CONFIGURES_CPU_MITIGATIONS
bool

if !ARCH_CONFIGURES_CPU_MITIGATIONS
config CPU_MITIGATIONS
def_bool y
endif

menu "General architecture-dependent options"

config ARCH_HAS_SUBPAGE_FAULTS
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1 change: 0 additions & 1 deletion arch/arc/boot/dts/hsdk.dts
Expand Up @@ -205,7 +205,6 @@
};

gmac: ethernet@8000 {
#interrupt-cells = <1>;
compatible = "snps,dwmac";
reg = <0x8000 0x2000>;
interrupts = <10>;
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8 changes: 4 additions & 4 deletions arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
Expand Up @@ -293,7 +293,7 @@

regulator-state-standby {
regulator-on-in-suspend;
regulator-suspend-voltage = <1150000>;
regulator-suspend-microvolt = <1150000>;
regulator-mode = <4>;
};

Expand All @@ -314,7 +314,7 @@

regulator-state-standby {
regulator-on-in-suspend;
regulator-suspend-voltage = <1050000>;
regulator-suspend-microvolt = <1050000>;
regulator-mode = <4>;
};

Expand All @@ -331,7 +331,7 @@
regulator-always-on;

regulator-state-standby {
regulator-suspend-voltage = <1800000>;
regulator-suspend-microvolt = <1800000>;
regulator-on-in-suspend;
};

Expand All @@ -346,7 +346,7 @@
regulator-max-microvolt = <3700000>;

regulator-state-standby {
regulator-suspend-voltage = <1800000>;
regulator-suspend-microvolt = <1800000>;
regulator-on-in-suspend;
};

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1 change: 1 addition & 0 deletions arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-common.dtsi
Expand Up @@ -805,6 +805,7 @@
&pinctrl_usb_pwr>;
dr_mode = "host";
power-active-high;
over-current-active-low;
disable-over-current;
status = "okay";
};
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/mediatek/mt2712-evb.dts
Expand Up @@ -129,7 +129,7 @@
};

&pio {
eth_default: eth_default {
eth_default: eth-default-pins {
tx_pins {
pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3>,
<MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2>,
Expand All @@ -156,7 +156,7 @@
};
};

eth_sleep: eth_sleep {
eth_sleep: eth-sleep-pins {
tx_pins {
pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71>,
<MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72>,
Expand All @@ -182,14 +182,14 @@
};
};

usb0_id_pins_float: usb0_iddig {
usb0_id_pins_float: usb0-iddig-pins {
pins_iddig {
pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>;
bias-pull-up;
};
};

usb1_id_pins_float: usb1_iddig {
usb1_id_pins_float: usb1-iddig-pins {
pins_iddig {
pinmux = <MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B>;
bias-pull-up;
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3 changes: 2 additions & 1 deletion arch/arm64/boot/dts/mediatek/mt2712e.dtsi
Expand Up @@ -249,10 +249,11 @@
#clock-cells = <1>;
};

infracfg: syscon@10001000 {
infracfg: clock-controller@10001000 {
compatible = "mediatek,mt2712-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};

pericfg: syscon@10003000 {
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34 changes: 14 additions & 20 deletions arch/arm64/boot/dts/mediatek/mt7622.dtsi
Expand Up @@ -252,7 +252,7 @@
clock-names = "hif_sel";
};

cir: cir@10009000 {
cir: ir-receiver@10009000 {
compatible = "mediatek,mt7622-cir";
reg = <0 0x10009000 0 0x1000>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>;
Expand Down Expand Up @@ -283,16 +283,14 @@
};
};

apmixedsys: apmixedsys@10209000 {
compatible = "mediatek,mt7622-apmixedsys",
"syscon";
apmixedsys: clock-controller@10209000 {
compatible = "mediatek,mt7622-apmixedsys";
reg = <0 0x10209000 0 0x1000>;
#clock-cells = <1>;
};

topckgen: topckgen@10210000 {
compatible = "mediatek,mt7622-topckgen",
"syscon";
topckgen: clock-controller@10210000 {
compatible = "mediatek,mt7622-topckgen";
reg = <0 0x10210000 0 0x1000>;
#clock-cells = <1>;
};
Expand Down Expand Up @@ -515,7 +513,6 @@
<&pericfg CLK_PERI_AUXADC_PD>;
clock-names = "therm", "auxadc";
resets = <&pericfg MT7622_PERI_THERM_SW_RST>;
reset-names = "therm";
mediatek,auxadc = <&auxadc>;
mediatek,apmixedsys = <&apmixedsys>;
nvmem-cells = <&thermal_calibration>;
Expand Down Expand Up @@ -734,9 +731,8 @@
power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>;
};

ssusbsys: ssusbsys@1a000000 {
compatible = "mediatek,mt7622-ssusbsys",
"syscon";
ssusbsys: clock-controller@1a000000 {
compatible = "mediatek,mt7622-ssusbsys";
reg = <0 0x1a000000 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
Expand Down Expand Up @@ -793,9 +789,8 @@
};
};

pciesys: pciesys@1a100800 {
compatible = "mediatek,mt7622-pciesys",
"syscon";
pciesys: clock-controller@1a100800 {
compatible = "mediatek,mt7622-pciesys";
reg = <0 0x1a100800 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
Expand Down Expand Up @@ -921,12 +916,13 @@
};
};

hifsys: syscon@1af00000 {
compatible = "mediatek,mt7622-hifsys", "syscon";
hifsys: clock-controller@1af00000 {
compatible = "mediatek,mt7622-hifsys";
reg = <0 0x1af00000 0 0x70>;
#clock-cells = <1>;
};

ethsys: syscon@1b000000 {
ethsys: clock-controller@1b000000 {
compatible = "mediatek,mt7622-ethsys",
"syscon";
reg = <0 0x1b000000 0 0x1000>;
Expand Down Expand Up @@ -966,9 +962,7 @@
};

eth: ethernet@1b100000 {
compatible = "mediatek,mt7622-eth",
"mediatek,mt2701-eth",
"syscon";
compatible = "mediatek,mt7622-eth";
reg = <0 0x1b100000 0 0x20000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 224 IRQ_TYPE_LEVEL_LOW>,
Expand Down
6 changes: 3 additions & 3 deletions arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
Expand Up @@ -146,19 +146,19 @@

&cpu_thermal {
cooling-maps {
cpu-active-high {
map-cpu-active-high {
/* active: set fan to cooling level 2 */
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_active_high>;
};

cpu-active-med {
map-cpu-active-med {
/* active: set fan to cooling level 1 */
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active_med>;
};

cpu-active-low {
map-cpu-active-low {
/* active: set fan to cooling level 0 */
cooling-device = <&fan 0 0>;
trip = <&cpu_trip_active_low>;
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