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Merge remote-tracking branch 'stable/linux-6.8.y' into v6.8+
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xdevs23 committed Mar 27, 2024
2 parents 59901e2 + 03a22b5 commit 3082899
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Showing 718 changed files with 8,672 additions and 7,569 deletions.
Expand Up @@ -127,6 +127,7 @@ patternProperties:
- qcom,dsi-phy-20nm
- qcom,dsi-phy-28nm-8226
- qcom,dsi-phy-28nm-hpm
- qcom,dsi-phy-28nm-hpm-fam-b
- qcom,dsi-phy-28nm-lp
- qcom,hdmi-phy-8084
- qcom,hdmi-phy-8660
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13 changes: 11 additions & 2 deletions Documentation/devicetree/bindings/iommu/arm,smmu.yaml
Expand Up @@ -484,7 +484,12 @@ allOf:
- if:
properties:
compatible:
const: qcom,sm8450-smmu-500
items:
- const: qcom,sm8450-smmu-500
- const: qcom,adreno-smmu
- const: qcom,smmu-500
- const: arm,mmu-500

then:
properties:
clock-names:
Expand All @@ -508,7 +513,11 @@ allOf:
- if:
properties:
compatible:
const: qcom,sm8550-smmu-500
items:
- const: qcom,sm8550-smmu-500
- const: qcom,adreno-smmu
- const: qcom,smmu-500
- const: arm,mmu-500
then:
properties:
clock-names:
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Expand Up @@ -36,7 +36,7 @@ properties:

properties:
port@0:
$ref: /schemas/graph.yaml#/$defs/port-base
$ref: /schemas/graph.yaml#/properties/port
description: Analog input port

properties:
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4 changes: 2 additions & 2 deletions Documentation/driver-api/soundwire/stream.rst
Expand Up @@ -324,12 +324,12 @@ framework, this stream state is linked to .hw_params() operation.
int sdw_stream_add_master(struct sdw_bus * bus,
struct sdw_stream_config * stream_config,
struct sdw_ports_config * ports_config,
const struct sdw_ports_config * ports_config,
struct sdw_stream_runtime * stream);
int sdw_stream_add_slave(struct sdw_slave * slave,
struct sdw_stream_config * stream_config,
struct sdw_ports_config * ports_config,
const struct sdw_ports_config * ports_config,
struct sdw_stream_runtime * stream);
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2 changes: 1 addition & 1 deletion Documentation/netlink/specs/devlink.yaml
Expand Up @@ -290,7 +290,7 @@ attribute-sets:
enum: eswitch-mode
-
name: eswitch-inline-mode
type: u16
type: u8
enum: eswitch-inline-mode
-
name: dpipe-tables
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1 change: 1 addition & 0 deletions Documentation/netlink/specs/dpll.yaml
Expand Up @@ -274,6 +274,7 @@ attribute-sets:
-
name: capabilities
type: u32
enum: pin-capabilities
-
name: parent-device
type: nest
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2 changes: 1 addition & 1 deletion Documentation/networking/net_cachelines/net_device.rst
Expand Up @@ -13,7 +13,7 @@ struct_dev_ifalias* ifalias
unsigned_long mem_end
unsigned_long mem_start
unsigned_long base_addr
unsigned_long state
unsigned_long state read_mostly read_mostly netif_running(dev)
struct_list_head dev_list
struct_list_head napi_list
struct_list_head unreg_list
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2 changes: 1 addition & 1 deletion Makefile
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 8
SUBLEVEL = 1
SUBLEVEL = 2
EXTRAVERSION =
NAME = Hurr durr I'ma ninja sloth

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2 changes: 1 addition & 1 deletion arch/arm/boot/dts/arm/arm-realview-pb1176.dts
Expand Up @@ -451,7 +451,7 @@

/* Direct-mapped development chip ROM */
pb1176_rom@10200000 {
compatible = "direct-mapped";
compatible = "mtd-rom";
reg = <0x10200000 0x4000>;
bank-width = <1>;
};
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25 changes: 16 additions & 9 deletions arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi
Expand Up @@ -117,17 +117,9 @@
#address-cells = <1>;
#size-cells = <0>;

phy_port2: phy@1 {
reg = <1>;
};

phy_port3: phy@2 {
reg = <2>;
};

switch@10 {
compatible = "qca,qca8334";
reg = <10>;
reg = <0x10>;
reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;

switch_ports: ports {
Expand All @@ -149,15 +141,30 @@
eth2: port@2 {
reg = <2>;
label = "eth2";
phy-mode = "internal";
phy-handle = <&phy_port2>;
};

eth1: port@3 {
reg = <3>;
label = "eth1";
phy-mode = "internal";
phy-handle = <&phy_port3>;
};
};

mdio {
#address-cells = <1>;
#size-cells = <0>;

phy_port2: ethernet-phy@1 {
reg = <1>;
};

phy_port3: ethernet-phy@2 {
reg = <2>;
};
};
};
};
};
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2 changes: 1 addition & 1 deletion arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
Expand Up @@ -1234,7 +1234,7 @@

qfprom: qfprom@fc4bc000 {
compatible = "qcom,msm8974-qfprom", "qcom,qfprom";
reg = <0xfc4bc000 0x1000>;
reg = <0xfc4bc000 0x2100>;
#address-cells = <1>;
#size-cells = <1>;

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12 changes: 12 additions & 0 deletions arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts
Expand Up @@ -209,6 +209,18 @@
status = "okay";
};

&extal1_clk {
clock-frequency = <26000000>;
};

&extal2_clk {
clock-frequency = <48000000>;
};

&extalr_clk {
clock-frequency = <32768>;
};

&pfc {
scifa0_pins: scifa0 {
groups = "scifa0_data";
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9 changes: 6 additions & 3 deletions arch/arm/boot/dts/renesas/r8a73a4.dtsi
Expand Up @@ -450,17 +450,20 @@
extalr_clk: extalr {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
extal1_clk: extal1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
extal2_clk: extal2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
fsiack_clk: fsiack {
compatible = "fixed-clock";
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13 changes: 5 additions & 8 deletions arch/arm/crypto/sha256_glue.c
Expand Up @@ -24,32 +24,29 @@

#include "sha256_glue.h"

asmlinkage void sha256_block_data_order(u32 *digest, const void *data,
unsigned int num_blks);
asmlinkage void sha256_block_data_order(struct sha256_state *state,
const u8 *data, int num_blks);

int crypto_sha256_arm_update(struct shash_desc *desc, const u8 *data,
unsigned int len)
{
/* make sure casting to sha256_block_fn() is safe */
BUILD_BUG_ON(offsetof(struct sha256_state, state) != 0);

return sha256_base_do_update(desc, data, len,
(sha256_block_fn *)sha256_block_data_order);
return sha256_base_do_update(desc, data, len, sha256_block_data_order);
}
EXPORT_SYMBOL(crypto_sha256_arm_update);

static int crypto_sha256_arm_final(struct shash_desc *desc, u8 *out)
{
sha256_base_do_finalize(desc,
(sha256_block_fn *)sha256_block_data_order);
sha256_base_do_finalize(desc, sha256_block_data_order);
return sha256_base_finish(desc, out);
}

int crypto_sha256_arm_finup(struct shash_desc *desc, const u8 *data,
unsigned int len, u8 *out)
{
sha256_base_do_update(desc, data, len,
(sha256_block_fn *)sha256_block_data_order);
sha256_base_do_update(desc, data, len, sha256_block_data_order);
return crypto_sha256_arm_final(desc, out);
}
EXPORT_SYMBOL(crypto_sha256_arm_finup);
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12 changes: 5 additions & 7 deletions arch/arm/crypto/sha512-glue.c
Expand Up @@ -25,27 +25,25 @@ MODULE_ALIAS_CRYPTO("sha512");
MODULE_ALIAS_CRYPTO("sha384-arm");
MODULE_ALIAS_CRYPTO("sha512-arm");

asmlinkage void sha512_block_data_order(u64 *state, u8 const *src, int blocks);
asmlinkage void sha512_block_data_order(struct sha512_state *state,
u8 const *src, int blocks);

int sha512_arm_update(struct shash_desc *desc, const u8 *data,
unsigned int len)
{
return sha512_base_do_update(desc, data, len,
(sha512_block_fn *)sha512_block_data_order);
return sha512_base_do_update(desc, data, len, sha512_block_data_order);
}

static int sha512_arm_final(struct shash_desc *desc, u8 *out)
{
sha512_base_do_finalize(desc,
(sha512_block_fn *)sha512_block_data_order);
sha512_base_do_finalize(desc, sha512_block_data_order);
return sha512_base_finish(desc, out);
}

int sha512_arm_finup(struct shash_desc *desc, const u8 *data,
unsigned int len, u8 *out)
{
sha512_base_do_update(desc, data, len,
(sha512_block_fn *)sha512_block_data_order);
sha512_base_do_update(desc, data, len, sha512_block_data_order);
return sha512_arm_final(desc, out);
}

Expand Down
2 changes: 1 addition & 1 deletion arch/arm64/Kconfig
Expand Up @@ -198,7 +198,7 @@ config ARM64
if DYNAMIC_FTRACE_WITH_ARGS && DYNAMIC_FTRACE_WITH_CALL_OPS
select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS \
if (DYNAMIC_FTRACE_WITH_ARGS && !CFI_CLANG && \
!CC_OPTIMIZE_FOR_SIZE)
(CC_IS_CLANG || !CC_OPTIMIZE_FOR_SIZE))
select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY \
if DYNAMIC_FTRACE_WITH_ARGS
select HAVE_SAMPLE_FTRACE_DIRECT
Expand Down
2 changes: 2 additions & 0 deletions arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
Expand Up @@ -291,6 +291,8 @@
};

&spdif {
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx_pin>;
status = "okay";
};

Expand Down
2 changes: 2 additions & 0 deletions arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
Expand Up @@ -166,6 +166,8 @@
};

&spdif {
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx_pin>;
status = "okay";
};

Expand Down
7 changes: 3 additions & 4 deletions arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
Expand Up @@ -406,6 +406,7 @@
function = "spi1";
};

/omit-if-no-ref/
spdif_tx_pin: spdif-tx-pin {
pins = "PH7";
function = "spdif";
Expand Down Expand Up @@ -655,10 +656,8 @@
clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
clock-names = "apb", "spdif";
resets = <&ccu RST_BUS_SPDIF>;
dmas = <&dma 2>;
dma-names = "tx";
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx_pin>;
dmas = <&dma 2>, <&dma 2>;
dma-names = "rx", "tx";
status = "disabled";
};

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3 changes: 0 additions & 3 deletions arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
Expand Up @@ -227,9 +227,6 @@
brcm,num-gphy = <5>;
brcm,num-rgmii-ports = <2>;

#address-cells = <1>;
#size-cells = <0>;

ports: ports {
#address-cells = <1>;
#size-cells = <0>;
Expand Down

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