sdram
Here are 39 public repositories matching this topic...
An initial project for STM32F429ZI (aka STM32F429I-Disco1). It uses LL but no HAL.
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Oct 22, 2020 - C
A cache controller implementation in VHDL for the demonstration of SRAM and SDRAM.
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May 6, 2022 - C
Simple SDRAM controller written in SystemVerilog
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Jun 1, 2022 - SystemVerilog
🛠 A SDRAM controller in Verilog HDL
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Mar 21, 2022 - Verilog
High-Speed SystemVerilog SDRAM Controller
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Jan 27, 2024 - SystemVerilog
Design Verification of Flash, UART, and SDRAM controller for a 32 bit embedded RISC microprocessor using cocotb.
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Oct 15, 2023 - Verilog
SDR SDRAM Controller with Avalon-MM bus; [Bugged, deprecated]
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Apr 11, 2022 - Verilog
(LGPL) Demonstration of how to use a memory-mapped SDRAM through the Flexible Memory Controller
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Jul 30, 2017 - C
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Aug 9, 2018 - Verilog
L2 R4: Synwit 150MHz Cortex-M33 LCD MCU (SWM34S)
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Feb 12, 2023 - C
A HDL SDRAM controller designed for retro hardware and FPGAs
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Jun 25, 2023 - SystemVerilog
This SDRAM controller is for MT48LC32M16 SDRAM. This module was designed under the assumption that the clock rate is 100MHz.
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Feb 7, 2021 - Verilog
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