An approach to algorithm optimization through circuit minimization techniques.
-
Updated
Apr 10, 2017 - Java
An approach to algorithm optimization through circuit minimization techniques.
Logic synthesis and verification framework
Fast Heuristic Minimization of Exclusive-Sums-of-Products
C++ header-only And-Inverter graph (AIG) library
Yosys passes to syntheize to NaN gates (à la http://tom7.org/nand/)
Electronic design automation for Minecraft
DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization
ABACUS is a tool for approximate logic synthesis
DATC RDF
Benchmarks for Approximate Circuit Synthesis
A collection of digital logic circuits
Approximate Logic Synthesis and Bi-Decomposition of Sum Of Products forms
A collection of the Logic Synthesis about peoples/papers/projects/tutorials...
This article describes how embedded languages and recursion can be used to create a tool that synthesizes a relatively efficient logical circuit for any chosen permutation of the set of all bit vectors of some fixed length.
MATLAB and HDL models of ACA-CSU approximate adders
This is a tutorial on standard digital design flow
Add a description, image, and links to the logic-synthesis topic page so that developers can more easily learn about it.
To associate your repository with the logic-synthesis topic, visit your repo's landing page and select "manage topics."