powered by FH-Hagenberg, Hardware-Software-Design, Austria.
Similar is a configurable tool for logic design and simulation for educational purposes. Depending on the demands of classes features may be activated or may be hidden to users. In the most primitive setting, flat and hierarchical designs can be designed and simulated without timing. Advanced features include logic gates with multi-bit ports, VHDL's 9-valued logic including resolution functions, transport and inertial delays for combinational gates, setup-times for sequential gates and a primitive model for metastable behavior of flipflops. Simulation runs are illustrated by means of a waveform viewer.
Similar uses Espresso from UCB for two-level optimization for large circuits and explains optimization by means of Karnaugh maps for small switching functions. An FSM editor allows entry and simulation of Moore and Mealy machines. Moreover, state transition and output functions may be synthesized and simulated on gate level, too.
Structural VHDL code of hierarchical designs may be generated for usage in common VHDL simulation environments.
With version 3.0.0 Similar allows the description of gates by means of an Hardware Description Language. Similar-HDL is a very small subset of VHDL and provides predefined types, processes and sequential statements including wait statements. HDL gates are fully integrated into the circuit editor and the simulation tools.
Similar is available for Windows 10, Windows 11 und Ubuntu and dynamically links to the unmodified Qt libraries in the pre-compiled format provided by th Qt company. A 32-Bit version (using Qt 5.15.2) and a 64-Bit version (Qt 6.4.0) are a available as NSIS installers and ZIP archives for Windows 10 and 11. For Ubuntu 20.04.1 a tarball is ready for download.
Downloads for all platforms are available on www.similar.at. Similar is currently under development - a user's guide is being prepared.