WIP: Llvm mos #4051
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WIP: Llvm mos #4051
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Modifying the go-llvm package to not reference those variables https://github.com/danacr/go-llvm/pull/1/files: gets us to this: I'm not sure this is good enough for the compiler |
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It appears that you're using a development branch of LLVM? If there is a LLVM 16 version of the MOS backend, I would suggest working with that. |
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Thank you @aykevl for the awesome pointer! After some digging, I found the commit that was llvm16 and had the Currently working on hand-writing the svd for 6502, I got this far based on https://raw.githubusercontent.com/mlund/mos-hardware/main/src/c64.rs and chatgpt: <?xml version="1.0" encoding="utf-8"?>
<device schemaVersion="1.1">
<vendor>Commodore</vendor>
<name>C64</name>
<peripherals>
<!-- CPU (MOS 6510) -->
<peripheral>
<name>CPU</name>
<baseAddress>0x0001</baseAddress>
<description>MOS 6510 Processor</description>
<registers>
<register>
<name>CPU_PORT</name>
<addressOffset>0x0001</addressOffset>
<description>Control flags for the CPU port R6510</description>
<size>8</size>
<access>RW</access>
</register>
</registers>
</peripheral>
<!-- VIC-II (Video Interface Chip) -->
<peripheral>
<name>VIC-II</name>
<baseAddress>0xD000</baseAddress>
<description>Video Interface Chip</description>
<registers>
<register>
<name>VIC</name>
<addressOffset>0x0000</addressOffset>
<description>Video Interface Controller</description>
<size>8</size>
<access>RW</access>
</register>
</registers>
</peripheral>
<!-- SID (Sound Interface Device) -->
<peripheral>
<name>SID</name>
<baseAddress>0xD400</baseAddress>
<description>Sound Interface Device</description>
<registers>
<register>
<name>SID</name>
<addressOffset>0x0000</addressOffset>
<description>Sound Interface Device</description>
<size>8</size>
<access>RW</access>
</register>
</registers>
</peripheral>
<!-- CIA1 -->
<peripheral>
<name>CIA1</name>
<baseAddress>0xDC00</baseAddress>
<description>Complex Interface Adapter 1</description>
<registers>
<register>
<name>CIA1ControlA</name>
<addressOffset>0x0E</addressOffset>
<description>Control A Register for CIA1</description>
<size>8</size>
<access>RW</access>
</register>
</registers>
</peripheral>
<!-- CIA2 -->
<peripheral>
<name>CIA2</name>
<baseAddress>0xDD00</baseAddress>
<description>Complex Interface Adapter 2</description>
</peripheral>
<!-- Memory Map -->
<peripheral>
<name>Memory</name>
<baseAddress>0x0000</baseAddress>
<description>Main Memory</description>
<registers>
<register>
<name>DEFAULT_VIDEO_MEMORY</name>
<addressOffset>0x0400</addressOffset>
<description>Default Video Memory</description>
<size>8</size>
<access>RW</access>
</register>
<register>
<name>COLOR_RAM</name>
<addressOffset>0xD800</addressOffset>
<description>Color RAM</description>
<size>8</size>
<access>RW</access>
</register>
</registers>
</peripheral>
<!-- Additional peripherals and their registers can be added here -->
</peripherals>
</device> |
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currently I'm failing at building a simple print hello world application: @aykevl do you happen to know what is the minimal thing that I should add to go further? I know my machine, runtime, and target are bad :) |
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If you hadn't seen already, this might be useful (though perhaps a bit outdated): https://github.com/tinygo-org/tinygo/wiki/Adding-a-new-board Regarding the build issue you're running into: you need to add a way to disable and restore interrupts. |
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thank you so much @aykevl ! I've been trying to follow the guide, but adding a new architecture has not been straightforward :) It looks like I have my work cut out for me: I guess this is the bare minimum I need to support to get the print program to work |
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it now builds, but fails to link :) this is a bit tougher: |
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What's this main.go file? I'm surprised you're running into atomics issues. I recommend starting out with a very minimal example, such as src/examples/serial. |
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hi @aykevl this is the package main
func main() {
println("hello world")
} |
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Huh, weird. I wonder where those atomics are used? |
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@aykevl would it be possible to specify a different binary to build to a specific target? Or can I create and export a build and then manually pass it to llvm? https://github.com/llvm-mos/llvm-mos-sdk?tab=readme-ov-file#compile-an-example |
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note, if I set |
It's best not to use |
You mean whether we can use an external Clang for linking? |
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