Pinned

1. DNN-from-scratch-coursera-and-image-classification DNN-from-scratch-coursera-and-image-classification Public

   deep neural networks implementation from scratch in coursera.com

   Jupyter Notebook

2. graph-theory-project-optimization-find-a-short-walk-that-traverses-all-nodes-in-a-graph- graph-theory-project-optimization-find-a-short-walk-that-traverses-all-nodes-in-a-graph- Public

   find a short walk that traverses all nodes in a graph

   Python

3. image-classification-with-Tensorflow-and-CNN image-classification-with-Tensorflow-and-CNN Public

   Tensorflow and convolutional neural networks

   Jupyter Notebook

4. Master-Slave-Atmega32-microcontrollers-using-SPI-protocol-and-fast-PWA-tempreture-controlling-system Master-Slave-Atmega32-microcontrollers-using-SPI-protocol-and-fast-PWA-tempreture-controlling-system Public

   I used two Atmega32 AVR microcontrollers with SPI protocol and Master/Slave connection. Other elements: LM35 temperature sensor and a LCD and cooler Motors and heater and blinking warning LED. Usin…

   C

5. Refined-D-ary-minheap-for-Dijkstra-s-algorithm-in-a-weighted-directed-graph Refined-D-ary-minheap-for-Dijkstra-s-algorithm-in-a-weighted-directed-graph Public

   Refined D-ary minheap in which the children of each node are stored in a built in binary heap so that finding the minimum a node's children is faster. The binary min heap uses the array of D-ary mi…

   C++

6. 32-bit-pipelined-MIPS-processor-implemented-using-Verilog-with-booth-multiplication-algorithm 32-bit-pipelined-MIPS-processor-implemented-using-Verilog-with-booth-multiplication-algorithm Public

   32-bit pipelined MIPS CPU using Verilog with booth multiplication algorithm (faster multiplication in hardware). Xilinx Sesign Suite

   Verilog 3