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SeaM implementation #473

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Implementation for MSc thesis SeaM memory representation:

  • Theory of Memory: in lib/seahorn/BvOpSem2RawMemMgr.hh, add m_spObjName:="sea.obj" to represent pointer objects base in the form of sea.obj.N; during translation of allocation, use function mkBasedPtr(base, offset) to create object bases -- base:=m_spObjName, offset is the end address of StaticOpSemAllocator::salloc(Expr bytes, uint32_t align = 0);
  • handling of memcpy and memset: defined new intermediate Expr node types MEMSET_WORDS, MEMCPY_WORDS in include/seahorn/Expr/ExprOpMem.hh
  • ARM: defined in include/seahorn/Expr/ExprAddrRangeMap.hh and lib/seahorn/Smt/ExprAddrRangeMap.cc; unit tests in units/units_arm.cpp
  • StoreMap: defined new Expr node type STORE_MAP and accompanying operations in include/seahorn/Expr/ExprOpArray.hh; added cons list like node type CONS in include/seahorn/Expr/ExprOpMisc.hh; unit tests in units/units_store_map.cpp
  • rewriter: include/seahorn/Expr/ExprRewriter.hh and lib/seahorn/Smt/ExprRewriter.cc; rewrite rules defined in include/seahorn/Expr/ExprRewriteRule.hh
    replaces draft PR Hybrid memory representation #400

(to sqaush): use rewriter to apply pattern recursively

feat(ExprVisitor): set selected kids to visit instead of always visit all

(tsquash): use more restrained vistor to only visit first arg of store

(tsquash): rename, cleanup

use simple custom rewriter for array store; revert m_selectedKids
in house version is gud

feat(mem-repr): iterative rewriter for ITE expr
(intrim): cached visit; stateless rules

(intrim): OOP design
(to-squash): handle ites as well

feat(to-squash): bvadd rules finalized
draft(nmr): present stack ptr expr with based obj type

draft(nmr): low precision but sound addr filtering

draft(hybrid): push down bvadd; better addrs range

draft(hybrid): AddrRange data struc to keep track of isTop
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