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Christopher Celio edited this page Nov 28, 2015 · 4 revisions

Welcome to the riscv-boom wiki!

BOOM is a synthesizable, parameterized, superscalar out-of-order RISC-V core. Our goal is to provide a readable, open-source implementation for use in education, research, and industry.

BOOM is inspired by the MIPS R10k and the Alpha 21264. Like the R10k and the 21264, BOOM is a unified physical register file design (also known as “explicit register renaming”). Here's a (very) high-level diagram of BOOM:

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