Skip to content

TST: Add CPU Dispatch test for RISC-V Vector Extenson. #3582

TST: Add CPU Dispatch test for RISC-V Vector Extenson.

TST: Add CPU Dispatch test for RISC-V Vector Extenson. #3582

Triggered via pull request May 10, 2024 10:31
Status Success
Total duration 7m 22s
Artifacts

linux_blas.yml

on: pull_request
OpenBLAS (Fedora, no pkg-config, LP64/ILP64)
4m 20s
OpenBLAS (Fedora, no pkg-config, LP64/ILP64)
FlexiBLAS (LP64, ILP64 on Fedora)
4m 42s
FlexiBLAS (LP64, ILP64 on Fedora)
OpenBLAS with CMake
2m 5s
OpenBLAS with CMake
Debian libblas/liblapack
2m 0s
Debian libblas/liblapack
OpenSUSE Netlib BLAS/LAPACK
2m 36s
OpenSUSE Netlib BLAS/LAPACK
MKL (LP64, ILP64, SDL)
5m 1s
MKL (LP64, ILP64, SDL)
BLIS
1m 59s
BLIS
ATLAS
1m 49s
ATLAS
Matrix: openblas32_stable_nightly
Fit to window
Zoom out
Zoom in