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Linux SIMD tests

TST: Add CPU Dispatch test for RISC-V Vector Extenson. #3578

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TST: Add CPU Dispatch test for RISC-V Vector Extenson.

TST: Add CPU Dispatch test for RISC-V Vector Extenson. #3578

Triggered via pull request May 10, 2024 10:14
@ArielHelenetoArielHeleneto
synchronize #26300
ArielHeleneto:main
Status Cancelled
Total duration 3m 43s
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linux_simd.yml

on: pull_request
baseline_only
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baseline_only
old_gcc
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old_gcc
intel_sde_avx512
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intel_sde_avx512
intel_sde_spr
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intel_sde_spr
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baseline_only
Canceling since a higher priority waiting request for 'Linux SIMD tests-main' exists