Add CDC break support (untested)

newaetech · Nov 7, 2023 · 8ec81db · 8ec81db
1 parent 677ab91
commit 8ec81db
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Showing 5 changed files with 14 additions and 1 deletion.
diff --git a/microfw/CW310/src/config/conf_usb.h b/microfw/CW310/src/config/conf_usb.h
@@ -495,6 +495,11 @@ bool main_setup_in_received(void);
 #define UDI_VENDOR_SETUP_OUT_RECEIVED()   main_setup_out_received()
 #define UDI_VENDOR_SETUP_IN_RECEIVED()    main_setup_in_received()
 
+bool naeusb_cdc_handle_send_break(uint8_t port, uint16_t wValue);
+
+#define UDI_CDC_HANDLE_SEND_BREAK(port, wValue) naeusb_cdc_handle_send_break(port, wValue)
+
+
 //! endpoints size for full speed
 //! Note: Disable the endpoints of a type, if size equal 0
 #define UDI_VENDOR_EPS_SIZE_INT_FS    0 /*64*/

diff --git a/microfw/CW310/src/main_cw310.c b/microfw/CW310/src/main_cw310.c
@@ -46,6 +46,8 @@ int usb_pd_soft_reset(void);
 void usb_pwr_setup(void);
 void check_power_state(void);
 
+uint8_t FPGA_PINS_ON = 0;
+
 void fpga_pins(bool enabled)
 {
 	gpio_configure_pin(PIN_FPGA_DONE_GPIO, PIN_FPGA_DONE_FLAGS);
@@ -54,6 +56,7 @@ void fpga_pins(bool enabled)
 	//gpio_configure_pin(PIO_PB18_IDX, PIO_OUTPUT_0);	
 
 	if (enabled){
+		FPGA_PINS_ON = 1;
 		#ifdef CONF_BOARD_PCK0
 		gpio_configure_pin(PIN_PCK0, PIN_PCK0_FLAGS);
 		#endif
@@ -118,6 +121,7 @@ void fpga_pins(bool enabled)
 		//gpio_configure_pin(SPI_SPCK_GPIO, SPI_SPCK_FLAGS); /* TODO: Add back */
 
 	} else {
+		FPGA_PINS_ON = 0;
 		#ifdef CONF_BOARD_PCK0
 		gpio_configure_pin(PIN_PCK0, PIO_INPUT);
 		#endif

diff --git a/microfw/CW310/src/main_cw340.c b/microfw/CW310/src/main_cw340.c
@@ -49,6 +49,7 @@ void fpga_pins(bool enabled);
 void usb_pwr_setup(void);
 void check_power_state(void);
 
+uint8_t FPGA_PINS_ON = 0;
 /*
 If enabled, configure FPGA pins as their default
 
@@ -62,6 +63,7 @@ void fpga_pins(bool enabled)
 	//gpio_configure_pin(PIO_PB18_IDX, PIO_OUTPUT_0);
 
 	if (enabled){
+		FPGA_PINS_ON = 1;
 		#ifdef CONF_BOARD_PCK0
 		gpio_configure_pin(PIN_PCK0, PIN_PCK0_FLAGS);
 		#endif
@@ -112,6 +114,7 @@ void fpga_pins(bool enabled)
 		//gpio_configure_pin(SPI_SPCK_GPIO, SPI_SPCK_FLAGS); /* TODO: Add back */
 
 	} else {
+		FPGA_PINS_ON = 0;
 		// high-z FPGA pins to avoid powering the FPGA thru these pins
 		#ifdef CONF_BOARD_PCK0
 		gpio_configure_pin(PIN_PCK0, PIO_INPUT);

diff --git a/microfw/CW310/src/naeusb b/microfw/CW310/src/naeusb
diff --git a/microfw/CW310/src/naeusb_board_config.h b/microfw/CW310/src/naeusb_board_config.h
@@ -502,4 +502,5 @@ void kill_fpga_power(void);
 
 #endif /* CW305_PLUS_PINS_H_ */
 
+extern uint8_t FPGA_PINS_ON;
 #endif