Redefine the slots of slow instructions

Cargo.toml

@@ -1,7 +1,7 @@
 [package]
 name = "ckb-vm"
 description = "CKB's Virtual machine"
-version = "0.23.0"
+version = "0.23.1"
 license = "MIT"
 authors = ["Nervos Core Dev <dev@nervos.org>"]
 edition = "2021"
@@ -27,7 +27,7 @@ goblin_v023 = { package = "goblin", version = "=0.2.3" }
 goblin_v040 = { package = "goblin", version = "=0.4.0" }
 scroll = "0.10"
 serde = { version = "1.0", features = ["derive"] }
-ckb-vm-definitions = { path = "definitions", version = "=0.23.0" }
+ckb-vm-definitions = { path = "definitions", version = "=0.23.1" }
 derive_more = "0.99.2"
 rand = "0.7.3"
 

definitions/Cargo.toml

@@ -1,7 +1,7 @@
 [package]
 name = "ckb-vm-definitions"
 description = "Common definition files for CKB VM"
-version = "0.23.0"
+version = "0.23.1"
 license = "MIT"
 authors = ["Nervos Core Dev <dev@nervos.org>"]
 edition = "2021"

definitions/src/generate_asm_constants.rs

@@ -4,7 +4,7 @@ use ckb_vm_definitions::{
         RET_ECALL, RET_INVALID_PERMISSION, RET_MAX_CYCLES_EXCEEDED, RET_OUT_OF_BOUND, RET_SLOWPATH,
         TRACE_ITEM_LENGTH,
     },
-    instructions::{Instruction, INSTRUCTION_OPCODE_NAMES_LEVEL1, MAXIMUM_LEVEL1_OPCODE},
+    instructions::{Instruction, INSTRUCTION_OPCODE_NAMES},
     memory::{FLAG_DIRTY, FLAG_EXECUTABLE, FLAG_FREEZED, FLAG_WRITABLE, FLAG_WXORX_BIT},
     registers::{RA, SP},
     MEMORY_FRAMES, MEMORY_FRAMESIZE, MEMORY_FRAME_PAGE_SHIFTS, MEMORY_FRAME_SHIFTS,
@@ -162,7 +162,7 @@ fn main() {
     );
     println!();
 
-    for (op, name) in INSTRUCTION_OPCODE_NAMES_LEVEL1.iter().enumerate() {
+    for (op, name) in INSTRUCTION_OPCODE_NAMES.iter().enumerate() {
         println!("#define CKB_VM_ASM_OP_{} {}", name, op);
     }
     println!();
@@ -176,15 +176,15 @@ fn main() {
     println!("ckb_vm_asm_labels:");
     println!("#endif");
     println!(".CKB_VM_ASM_LABEL_TABLE:");
-    for name in INSTRUCTION_OPCODE_NAMES_LEVEL1.iter() {
+    for _ in 0..0x10 {
+        println!("\t.long\t.exit_slowpath - .CKB_VM_ASM_LABEL_TABLE");
+    }
+    for name in INSTRUCTION_OPCODE_NAMES.iter() {
         println!(
             "\t.long\t.CKB_VM_ASM_LABEL_OP_{} - .CKB_VM_ASM_LABEL_TABLE",
             name
         );
     }
-    for _ in MAXIMUM_LEVEL1_OPCODE + 1..0xF0 {
-        println!("\t.long\t.CKB_VM_ASM_LABEL_OP_UNLOADED - .CKB_VM_ASM_LABEL_TABLE");
-    }
     println!("\t.long\t.exit_slowpath - .CKB_VM_ASM_LABEL_TABLE");
     println!("#endif /* CKB_VM_ASM_GENERATE_LABEL_TABLES */");
 }

definitions/src/instructions.rs

@@ -26,147 +26,145 @@
 // instruction into the internal form here(much like how traces/micro-ops work.)
 //
 // About +op+ and +op2+:
-// When the op value is 0-239, it expresses a first-level instruction under fast
+// When the op value is 0x10-0xff, it expresses a first-level instruction under fast
 // path, at this time the value of op2 is ignored.
-// When the op value is 240-255, op and op2 are combined to express a
+// When the op value is 0x00-0x0f, op and op2 are combined to express a
 // second-level instruction under slow path.
 pub type Instruction = u64;
 
 pub type InstructionOpcode = u16;
 
 // IMC
-pub const OP_UNLOADED: InstructionOpcode = 0x00;
-pub const OP_ADD: InstructionOpcode = 0x01;
-pub const OP_ADDI: InstructionOpcode = 0x02;
-pub const OP_ADDIW: InstructionOpcode = 0x03;
-pub const OP_ADDW: InstructionOpcode = 0x04;
-pub const OP_AND: InstructionOpcode = 0x05;
-pub const OP_ANDI: InstructionOpcode = 0x06;
-pub const OP_AUIPC: InstructionOpcode = 0x07;
-pub const OP_BEQ: InstructionOpcode = 0x08;
-pub const OP_BGE: InstructionOpcode = 0x09;
-pub const OP_BGEU: InstructionOpcode = 0x0A;
-pub const OP_BLT: InstructionOpcode = 0x0B;
-pub const OP_BLTU: InstructionOpcode = 0x0C;
-pub const OP_BNE: InstructionOpcode = 0x0D;
-pub const OP_DIV: InstructionOpcode = 0x0E;
-pub const OP_DIVU: InstructionOpcode = 0x0F;
-pub const OP_DIVUW: InstructionOpcode = 0x10;
-pub const OP_DIVW: InstructionOpcode = 0x11;
-pub const OP_EBREAK: InstructionOpcode = 0x12;
-pub const OP_ECALL: InstructionOpcode = 0x13;
-pub const OP_FENCE: InstructionOpcode = 0x14;
-pub const OP_FENCEI: InstructionOpcode = 0x15;
-pub const OP_JAL: InstructionOpcode = 0x16;
-pub const OP_JALR: InstructionOpcode = 0x17;
-pub const OP_LB: InstructionOpcode = 0x18;
-pub const OP_LBU: InstructionOpcode = 0x19;
-pub const OP_LD: InstructionOpcode = 0x1A;
-pub const OP_LH: InstructionOpcode = 0x1B;
-pub const OP_LHU: InstructionOpcode = 0x1C;
-pub const OP_LUI: InstructionOpcode = 0x1D;
-pub const OP_LW: InstructionOpcode = 0x1E;
-pub const OP_LWU: InstructionOpcode = 0x1F;
-pub const OP_MUL: InstructionOpcode = 0x20;
-pub const OP_MULH: InstructionOpcode = 0x21;
-pub const OP_MULHSU: InstructionOpcode = 0x22;
-pub const OP_MULHU: InstructionOpcode = 0x23;
-pub const OP_MULW: InstructionOpcode = 0x24;
-pub const OP_OR: InstructionOpcode = 0x25;
-pub const OP_ORI: InstructionOpcode = 0x26;
-pub const OP_REM: InstructionOpcode = 0x27;
-pub const OP_REMU: InstructionOpcode = 0x28;
-pub const OP_REMUW: InstructionOpcode = 0x29;
-pub const OP_REMW: InstructionOpcode = 0x2A;
-pub const OP_SB: InstructionOpcode = 0x2B;
-pub const OP_SD: InstructionOpcode = 0x2C;
-pub const OP_SH: InstructionOpcode = 0x2D;
-pub const OP_SLL: InstructionOpcode = 0x2E;
-pub const OP_SLLI: InstructionOpcode = 0x2F;
-pub const OP_SLLIW: InstructionOpcode = 0x30;
-pub const OP_SLLW: InstructionOpcode = 0x31;
-pub const OP_SLT: InstructionOpcode = 0x32;
-pub const OP_SLTI: InstructionOpcode = 0x33;
-pub const OP_SLTIU: InstructionOpcode = 0x34;
-pub const OP_SLTU: InstructionOpcode = 0x35;
-pub const OP_SRA: InstructionOpcode = 0x36;
-pub const OP_SRAI: InstructionOpcode = 0x37;
-pub const OP_SRAIW: InstructionOpcode = 0x38;
-pub const OP_SRAW: InstructionOpcode = 0x39;
-pub const OP_SRL: InstructionOpcode = 0x3A;
-pub const OP_SRLI: InstructionOpcode = 0x3B;
-pub const OP_SRLIW: InstructionOpcode = 0x3C;
-pub const OP_SRLW: InstructionOpcode = 0x3D;
-pub const OP_SUB: InstructionOpcode = 0x3E;
-pub const OP_SUBW: InstructionOpcode = 0x3F;
-pub const OP_SW: InstructionOpcode = 0x40;
-pub const OP_XOR: InstructionOpcode = 0x41;
-pub const OP_XORI: InstructionOpcode = 0x42;
+// IMC
+pub const OP_UNLOADED: InstructionOpcode = 0x10;
+pub const OP_ADD: InstructionOpcode = 0x11;
+pub const OP_ADDI: InstructionOpcode = 0x12;
+pub const OP_ADDIW: InstructionOpcode = 0x13;
+pub const OP_ADDW: InstructionOpcode = 0x14;
+pub const OP_AND: InstructionOpcode = 0x15;
+pub const OP_ANDI: InstructionOpcode = 0x16;
+pub const OP_AUIPC: InstructionOpcode = 0x17;
+pub const OP_BEQ: InstructionOpcode = 0x18;
+pub const OP_BGE: InstructionOpcode = 0x19;
+pub const OP_BGEU: InstructionOpcode = 0x1a;
+pub const OP_BLT: InstructionOpcode = 0x1b;
+pub const OP_BLTU: InstructionOpcode = 0x1c;
+pub const OP_BNE: InstructionOpcode = 0x1d;
+pub const OP_DIV: InstructionOpcode = 0x1e;
+pub const OP_DIVU: InstructionOpcode = 0x1f;
+pub const OP_DIVUW: InstructionOpcode = 0x20;
+pub const OP_DIVW: InstructionOpcode = 0x21;
+pub const OP_EBREAK: InstructionOpcode = 0x22;
+pub const OP_ECALL: InstructionOpcode = 0x23;
+pub const OP_FENCE: InstructionOpcode = 0x24;
+pub const OP_FENCEI: InstructionOpcode = 0x25;
+pub const OP_JAL: InstructionOpcode = 0x26;
+pub const OP_JALR: InstructionOpcode = 0x27;
+pub const OP_LB: InstructionOpcode = 0x28;
+pub const OP_LBU: InstructionOpcode = 0x29;
+pub const OP_LD: InstructionOpcode = 0x2a;
+pub const OP_LH: InstructionOpcode = 0x2b;
+pub const OP_LHU: InstructionOpcode = 0x2c;
+pub const OP_LUI: InstructionOpcode = 0x2d;
+pub const OP_LW: InstructionOpcode = 0x2e;
+pub const OP_LWU: InstructionOpcode = 0x2f;
+pub const OP_MUL: InstructionOpcode = 0x30;
+pub const OP_MULH: InstructionOpcode = 0x31;
+pub const OP_MULHSU: InstructionOpcode = 0x32;
+pub const OP_MULHU: InstructionOpcode = 0x33;
+pub const OP_MULW: InstructionOpcode = 0x34;
+pub const OP_OR: InstructionOpcode = 0x35;
+pub const OP_ORI: InstructionOpcode = 0x36;
+pub const OP_REM: InstructionOpcode = 0x37;
+pub const OP_REMU: InstructionOpcode = 0x38;
+pub const OP_REMUW: InstructionOpcode = 0x39;
+pub const OP_REMW: InstructionOpcode = 0x3a;
+pub const OP_SB: InstructionOpcode = 0x3b;
+pub const OP_SD: InstructionOpcode = 0x3c;
+pub const OP_SH: InstructionOpcode = 0x3d;
+pub const OP_SLL: InstructionOpcode = 0x3e;
+pub const OP_SLLI: InstructionOpcode = 0x3f;
+pub const OP_SLLIW: InstructionOpcode = 0x40;
+pub const OP_SLLW: InstructionOpcode = 0x41;
+pub const OP_SLT: InstructionOpcode = 0x42;
+pub const OP_SLTI: InstructionOpcode = 0x43;
+pub const OP_SLTIU: InstructionOpcode = 0x44;
+pub const OP_SLTU: InstructionOpcode = 0x45;
+pub const OP_SRA: InstructionOpcode = 0x46;
+pub const OP_SRAI: InstructionOpcode = 0x47;
+pub const OP_SRAIW: InstructionOpcode = 0x48;
+pub const OP_SRAW: InstructionOpcode = 0x49;
+pub const OP_SRL: InstructionOpcode = 0x4a;
+pub const OP_SRLI: InstructionOpcode = 0x4b;
+pub const OP_SRLIW: InstructionOpcode = 0x4c;
+pub const OP_SRLW: InstructionOpcode = 0x4d;
+pub const OP_SUB: InstructionOpcode = 0x4e;
+pub const OP_SUBW: InstructionOpcode = 0x4f;
+pub const OP_SW: InstructionOpcode = 0x50;
+pub const OP_XOR: InstructionOpcode = 0x51;
+pub const OP_XORI: InstructionOpcode = 0x52;
 // B
-pub const OP_ADDUW: InstructionOpcode = 0x43;
-pub const OP_ANDN: InstructionOpcode = 0x44;
-pub const OP_BCLR: InstructionOpcode = 0x45;
-pub const OP_BCLRI: InstructionOpcode = 0x46;
-pub const OP_BEXT: InstructionOpcode = 0x47;
-pub const OP_BEXTI: InstructionOpcode = 0x48;
-pub const OP_BINV: InstructionOpcode = 0x49;
-pub const OP_BINVI: InstructionOpcode = 0x4a;
-pub const OP_BSET: InstructionOpcode = 0x4b;
-pub const OP_BSETI: InstructionOpcode = 0x4c;
-pub const OP_CLMUL: InstructionOpcode = 0x4d;
-pub const OP_CLMULH: InstructionOpcode = 0x4e;
-pub const OP_CLMULR: InstructionOpcode = 0x4f;
-pub const OP_CLZ: InstructionOpcode = 0x50;
-pub const OP_CLZW: InstructionOpcode = 0x51;
-pub const OP_CPOP: InstructionOpcode = 0x52;
-pub const OP_CPOPW: InstructionOpcode = 0x53;
-pub const OP_CTZ: InstructionOpcode = 0x54;
-pub const OP_CTZW: InstructionOpcode = 0x55;
-pub const OP_MAX: InstructionOpcode = 0x56;
-pub const OP_MAXU: InstructionOpcode = 0x57;
-pub const OP_MIN: InstructionOpcode = 0x58;
-pub const OP_MINU: InstructionOpcode = 0x59;
-pub const OP_ORCB: InstructionOpcode = 0x5a;
-pub const OP_ORN: InstructionOpcode = 0x5b;
-pub const OP_REV8: InstructionOpcode = 0x5c;
-pub const OP_ROL: InstructionOpcode = 0x5d;
-pub const OP_ROLW: InstructionOpcode = 0x5e;
-pub const OP_ROR: InstructionOpcode = 0x5f;
-pub const OP_RORI: InstructionOpcode = 0x60;
-pub const OP_RORIW: InstructionOpcode = 0x61;
-pub const OP_RORW: InstructionOpcode = 0x62;
-pub const OP_SEXTB: InstructionOpcode = 0x63;
-pub const OP_SEXTH: InstructionOpcode = 0x64;
-pub const OP_SH1ADD: InstructionOpcode = 0x65;
-pub const OP_SH1ADDUW: InstructionOpcode = 0x66;
-pub const OP_SH2ADD: InstructionOpcode = 0x67;
-pub const OP_SH2ADDUW: InstructionOpcode = 0x68;
-pub const OP_SH3ADD: InstructionOpcode = 0x69;
-pub const OP_SH3ADDUW: InstructionOpcode = 0x6a;
-pub const OP_SLLIUW: InstructionOpcode = 0x6b;
-pub const OP_XNOR: InstructionOpcode = 0x6c;
-pub const OP_ZEXTH: InstructionOpcode = 0x6d;
+pub const OP_ADDUW: InstructionOpcode = 0x53;
+pub const OP_ANDN: InstructionOpcode = 0x54;
+pub const OP_BCLR: InstructionOpcode = 0x55;
+pub const OP_BCLRI: InstructionOpcode = 0x56;
+pub const OP_BEXT: InstructionOpcode = 0x57;
+pub const OP_BEXTI: InstructionOpcode = 0x58;
+pub const OP_BINV: InstructionOpcode = 0x59;
+pub const OP_BINVI: InstructionOpcode = 0x5a;
+pub const OP_BSET: InstructionOpcode = 0x5b;
+pub const OP_BSETI: InstructionOpcode = 0x5c;
+pub const OP_CLMUL: InstructionOpcode = 0x5d;
+pub const OP_CLMULH: InstructionOpcode = 0x5e;
+pub const OP_CLMULR: InstructionOpcode = 0x5f;
+pub const OP_CLZ: InstructionOpcode = 0x60;
+pub const OP_CLZW: InstructionOpcode = 0x61;
+pub const OP_CPOP: InstructionOpcode = 0x62;
+pub const OP_CPOPW: InstructionOpcode = 0x63;
+pub const OP_CTZ: InstructionOpcode = 0x64;
+pub const OP_CTZW: InstructionOpcode = 0x65;
+pub const OP_MAX: InstructionOpcode = 0x66;
+pub const OP_MAXU: InstructionOpcode = 0x67;
+pub const OP_MIN: InstructionOpcode = 0x68;
+pub const OP_MINU: InstructionOpcode = 0x69;
+pub const OP_ORCB: InstructionOpcode = 0x6a;
+pub const OP_ORN: InstructionOpcode = 0x6b;
+pub const OP_REV8: InstructionOpcode = 0x6c;
+pub const OP_ROL: InstructionOpcode = 0x6d;
+pub const OP_ROLW: InstructionOpcode = 0x6e;
+pub const OP_ROR: InstructionOpcode = 0x6f;
+pub const OP_RORI: InstructionOpcode = 0x70;
+pub const OP_RORIW: InstructionOpcode = 0x71;
+pub const OP_RORW: InstructionOpcode = 0x72;
+pub const OP_SEXTB: InstructionOpcode = 0x73;
+pub const OP_SEXTH: InstructionOpcode = 0x74;
+pub const OP_SH1ADD: InstructionOpcode = 0x75;
+pub const OP_SH1ADDUW: InstructionOpcode = 0x76;
+pub const OP_SH2ADD: InstructionOpcode = 0x77;
+pub const OP_SH2ADDUW: InstructionOpcode = 0x78;
+pub const OP_SH3ADD: InstructionOpcode = 0x79;
+pub const OP_SH3ADDUW: InstructionOpcode = 0x7a;
+pub const OP_SLLIUW: InstructionOpcode = 0x7b;
+pub const OP_XNOR: InstructionOpcode = 0x7c;
+pub const OP_ZEXTH: InstructionOpcode = 0x7d;
 // Mop
-pub const OP_WIDE_MUL: InstructionOpcode = 0x6e;
-pub const OP_WIDE_MULU: InstructionOpcode = 0x6f;
-pub const OP_WIDE_MULSU: InstructionOpcode = 0x70;
-pub const OP_WIDE_DIV: InstructionOpcode = 0x71;
-pub const OP_WIDE_DIVU: InstructionOpcode = 0x72;
-pub const OP_FAR_JUMP_REL: InstructionOpcode = 0x73;
-pub const OP_FAR_JUMP_ABS: InstructionOpcode = 0x74;
-pub const OP_ADC: InstructionOpcode = 0x75;
-pub const OP_SBB: InstructionOpcode = 0x76;
-pub const OP_CUSTOM_LOAD_UIMM: InstructionOpcode = 0x77;
-pub const OP_CUSTOM_LOAD_IMM: InstructionOpcode = 0x78;
-pub const OP_CUSTOM_TRACE_END: InstructionOpcode = 0x79;
+pub const OP_WIDE_MUL: InstructionOpcode = 0x7e;
+pub const OP_WIDE_MULU: InstructionOpcode = 0x7f;
+pub const OP_WIDE_MULSU: InstructionOpcode = 0x80;
+pub const OP_WIDE_DIV: InstructionOpcode = 0x81;
+pub const OP_WIDE_DIVU: InstructionOpcode = 0x82;
+pub const OP_FAR_JUMP_REL: InstructionOpcode = 0x83;
+pub const OP_FAR_JUMP_ABS: InstructionOpcode = 0x84;
+pub const OP_ADC: InstructionOpcode = 0x85;
+pub const OP_SBB: InstructionOpcode = 0x86;
+pub const OP_CUSTOM_LOAD_UIMM: InstructionOpcode = 0x87;
+pub const OP_CUSTOM_LOAD_IMM: InstructionOpcode = 0x88;
+pub const OP_CUSTOM_TRACE_END: InstructionOpcode = 0x89;
 
-pub const MINIMAL_LEVEL1_OPCODE: InstructionOpcode = OP_UNLOADED;
-pub const MAXIMUM_LEVEL1_OPCODE: InstructionOpcode = OP_CUSTOM_TRACE_END;
-pub const LEVEL2_B_OPCODE: InstructionOpcode = 0xF0;
-pub const MINIMAL_LEVEL2_B_OPCODE2: InstructionOpcode = 0x00;
-pub const MAXIMUM_LEVEL2_B_OPCODE2: InstructionOpcode = 0x00;
+pub const MINIMAL_OPCODE: InstructionOpcode = OP_UNLOADED;
+pub const MAXIMUM_OPCODE: InstructionOpcode = OP_CUSTOM_TRACE_END;
 
-pub const INSTRUCTION_OPCODE_NAMES_LEVEL1: [&str; MAXIMUM_LEVEL1_OPCODE as usize + 1] = [
+pub const INSTRUCTION_OPCODE_NAMES: [&str; (MAXIMUM_OPCODE - MINIMAL_OPCODE + 1) as usize] = [
     "UNLOADED",
     "ADD",
     "ADDI",
@@ -292,5 +290,5 @@ pub const INSTRUCTION_OPCODE_NAMES_LEVEL1: [&str; MAXIMUM_LEVEL1_OPCODE as usize
 ];
 
 pub fn instruction_opcode_name(i: InstructionOpcode) -> &'static str {
-    INSTRUCTION_OPCODE_NAMES_LEVEL1[i as usize]
+    INSTRUCTION_OPCODE_NAMES[(i - MINIMAL_OPCODE) as usize]
 }