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Memory timing should be implemented in a cleaner way #7

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mstojcevich opened this issue Oct 2, 2017 · 0 comments
Open

Memory timing should be implemented in a cleaner way #7

mstojcevich opened this issue Oct 2, 2017 · 0 comments
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enhancement

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@mstojcevich
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The bus should probably be updated when any instruction tries to read/write memory instead of on a per-instruction basis.
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