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Placer-and-router-software-for-VLSI
Placer-and-router-software-for-VLSI PublicPlacer and Router for standard cells
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Hardware-Designs
Hardware-Designs PublicRTL Designs along with testbenches to verify them written in Verilog. Icarus Verilog an open source simulator was used for simulations.
Verilog 1
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hello-world
hello-world PublicThis project is just for practice in using Github for project management
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wavedrom.github.io
wavedrom.github.io PublicForked from wavedrom/wavedrom.github.io
Digital timing diagram editor
JavaScript
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